aboutsummaryrefslogtreecommitdiff
path: root/tcg/arm/tcg-target-con-str.h
AgeCommit message (Collapse)Author
2023-01-23tcg/arm: Use register pair allocation for qemu_{ld,st}_i64Richard Henderson
Although we still can't use ldrd and strd for all operations, increase the chances by getting the register allocation correct. Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-06-04tcg/arm: Implement minimal vector operationsRichard Henderson
Implementing dup2, add, sub, and, or, xor as the minimal set. This allows us to actually enable neon in the header file. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-06-04tcg/arm: Add host vector frameworkRichard Henderson
Add registers and function stubs. The functionality is disabled via use_neon_instructions defined to 0. We must still include results for the mandatory opcodes in tcg_target_op_def, as all opcodes are checked during tcg init. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-02-02tcg/arm: Split out target constraints to tcg-target-con-str.hRichard Henderson
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>