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2013-10-10tcg: Add qemu_ld_st_i32/64Richard Henderson
Step two in the transition, adding the new ldst opcodes. Keep the old opcodes around until all backends support the new opcodes. Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-10-10tcg: Add tcg-be-ldst.hRichard Henderson
Move TCGLabelQemuLdst and related stuff out of tcg.h. Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-10-10tcg-aarch64: Update to helper_ret_*_mmu routinesRichard Henderson
A minimal update to use the new helpers with the return address argument. Tested-by: Claudio Fontana <claudio.fontana@linaro.org> Reviewed-by: Claudio Fontana <claudio.fontana@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-09-02exec: Split softmmu_defs.hRichard Henderson
The _cmmu helpers can be moved to exec-all.h. The helpers that are used from TCG will shortly need access to tcg_target_long so move their declarations into tcg.h. This requires minor include adjustments to all TCG backends. Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-09-02tcg: Change tcg_out_ld/st offset to intptr_tRichard Henderson
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-09-02tcg: Change relocation offsets to intptr_tRichard Henderson
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-09-02tcg: Change flush_icache_range arguments to uintptr_tRichard Henderson
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-09-02tcg: Add muluh and mulsh opcodesRichard Henderson
Use them in places where mulu2 and muls2 are used. Optimize mulx2 with dead low part to mulxh. Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-07-15Merge git://github.com/hw-claudio/qemu-aarch64-queue into tcg-nextRichard Henderson
2013-07-15tcg/aarch64: Implement tlb lookup fast pathJani Kokkonen
Supports CONFIG_QEMU_LDST_OPTIMIZATION Signed-off-by: Jani Kokkonen <jani.kokkonen@huawei.com> Reviewed-by: Richard Henderson <rth@twiddle.net> Reviewed-by: Claudio Fontana <claudio.fontana@huawei.com>
2013-07-09tcg: Split rem requirement from div requirementRichard Henderson
There are several hosts with only a "div" insn. Remainder is computed manually from the quotient and inputs. We can do this generically. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-07-03tcg/aarch64: implement ldst 12bit scaled uimm offsetClaudio Fontana
implement the 12bit scaled unsigned immediate offset variant of LDR/STR. This improves code size by avoiding the movi + ldst_r for naturally aligned offsets in range. Signed-off-by: Claudio Fontana <claudio.fontana@huawei.com> Reviewed-by: Richard Henderson <rth@twiddle.net>
2013-06-12tcg/aarch64: implement user mode qemu ld/stJani Kokkonen
also put aarch64 in the list of archs that do not need an ldscript. Signed-off-by: Jani Kokkoken <jani.kokkonen@huawei.com> Signed-off-by: Claudio Fontana <claudio.fontana@huawei.com> Reviewed-by: Richard Henderson <rth@twiddle.net> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 51AF40EE.1000104@huawei.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-06-12tcg/aarch64: implement sign/zero extend operationsClaudio Fontana
implement the optional sign/zero extend operations with the dedicated aarch64 instructions. Signed-off-by: Claudio Fontana <claudio.fontana@huawei.com> Reviewed-by: Richard Henderson <rth@twiddle.net> Message-id: 51AC9A58.40502@huawei.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-06-12tcg/aarch64: implement byte swap operationsClaudio Fontana
implement the optional byte swap operations with the dedicated aarch64 instructions. Signed-off-by: Claudio Fontana <claudio.fontana@huawei.com> Reviewed-by: Richard Henderson <rth@twiddle.net> Message-id: 51AC9A33.9050003@huawei.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-06-12tcg/aarch64: implement AND/TEST immediate patternClaudio Fontana
add functions to AND/TEST registers with immediate patterns. Signed-off-by: Claudio Fontana <claudio.fontana@huawei.com> Reviewed-by: Richard Henderson <rth@twiddle.net> Message-id: 51AC9A0C.3090303@huawei.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-06-12tcg/aarch64: improve arith shifted regs operationsClaudio Fontana
for arith operations, add SUBS, ANDS, ADDS and add a shift parameter so that all arith instructions can make use of shifted registers. Signed-off-by: Claudio Fontana <claudio.fontana@huawei.com> Reviewed-by: Richard Henderson <rth@twiddle.net> Message-id: 51AC998B.7070506@huawei.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-06-12tcg/aarch64: implement new TCG target for aarch64Claudio Fontana
add preliminary support for TCG target aarch64. Signed-off-by: Claudio Fontana <claudio.fontana@huawei.com> Reviewed-by: Richard Henderson <rth@twiddle.net> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 51A5C596.3090108@huawei.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>