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QEMU is a generic and open source machine & userspace emulator and virtualizer
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2024-10-15
target/alpha: Use explicit little-endian LD/ST API
Philippe Mathieu-Daudé
2024-10-15
target/alpha: Replace ldtul_p() -> ldq_p()
Philippe Mathieu-Daudé
2024-10-15
target/hexagon: Replace ldtul_p() -> ldl_p()
Philippe Mathieu-Daudé
2024-10-13
target/arm: Fix alignment fault priority in get_phys_addr_lpae
Richard Henderson
2024-10-13
target/arm: Implement TCGCPUOps.tlb_fill_align
Richard Henderson
2024-10-13
target/arm: Move device detection earlier in get_phys_addr_lpae
Richard Henderson
2024-10-13
target/arm: Pass MemOp to get_phys_addr_lpae
Richard Henderson
2024-10-13
target/arm: Pass MemOp through get_phys_addr_twostage
Richard Henderson
2024-10-13
target/arm: Pass MemOp to get_phys_addr_nogpc
Richard Henderson
2024-10-13
target/arm: Pass MemOp to get_phys_addr_gpc
Richard Henderson
2024-10-13
target/arm: Pass MemOp to get_phys_addr_with_space_nogpc
Richard Henderson
2024-10-13
target/arm: Pass MemOp to get_phys_addr
Richard Henderson
2024-10-13
target/hppa: Implement TCGCPUOps.tlb_fill_align
Richard Henderson
2024-10-13
target/hppa: Handle alignment faults in hppa_get_physical_address
Richard Henderson
2024-10-13
target/hppa: Fix priority of T, D, and B page faults
Richard Henderson
2024-10-13
target/hppa: Perform access rights before protection id check
Richard Henderson
2024-10-13
target/hppa: Add MemOp argument to hppa_get_physical_address
Richard Henderson
2024-10-13
include/exec/memop: Rename get_alignment_bits
Richard Henderson
2024-10-13
target/i386/gdbstub: Expose orig_ax
Ilya Leoshkevich
2024-10-13
target/i386/gdbstub: Factor out gdb_get_reg() and gdb_write_reg()
Ilya Leoshkevich
2024-10-13
tcg: remove singlestep_enabled from DisasContextBase
Paolo Bonzini
2024-10-08
target/m68k: Always return a temporary from gen_lea_mode
Richard Henderson
2024-10-07
target/s390x: Use explicit big-endian LD/ST API
Philippe Mathieu-Daudé
2024-10-07
target/s390x: Replace ldtul_p() -> ldq_p()
Philippe Mathieu-Daudé
2024-10-07
target/m68k: Use explicit big-endian LD/ST API
Philippe Mathieu-Daudé
2024-10-04
Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging
Peter Maydell
2024-10-03
target/i386/kvm: Report which action failed in kvm_arch_put/get_registers
Julia Suvorova
2024-10-03
kvm: Allow kvm_arch_get/put_registers to accept Error**
Julia Suvorova
2024-10-03
target/i386: Expose IBPB-BRTYPE and SBPB CPUID bits to the guest
Fabiano Rosas
2024-10-03
kvm/i386: replace identity_base variable with a constant
Paolo Bonzini
2024-10-03
kvm/i386: refactor kvm_arch_init and split it into smaller functions
Ani Sinha
2024-10-03
Merge tag 'warn-pull-request' of https://gitlab.com/marcandre.lureau/qemu int...
Peter Maydell
2024-10-02
Merge tag 'pull-riscv-to-apply-20241002' of https://github.com/alistair23/qem...
Peter Maydell
2024-10-02
target/loongarch: fix -Werror=maybe-uninitialized false-positive
Marc-André Lureau
2024-10-02
kvm/i386: fix return values of is_host_cpu_intel()
Ani Sinha
2024-10-02
kvm/i386: make kvm_filter_msr() and related definitions private to kvm module
Ani Sinha
2024-10-02
target/i386: Raise the highest index value used for any VMCS encoding
Lei Wang
2024-10-02
target/i386: Add VMX control bits for nested FRED support
Xin Li (Intel)
2024-10-02
target/i386: Delete duplicated macro definition CR4_FRED_MASK
Xin Li (Intel)
2024-10-02
target/riscv/cpu_helper: Fix linking problem with semihosting disabled
Thomas Huth
2024-10-02
target/riscv32: Fix masking of physical address
Andrew Jones
2024-10-02
target: riscv: Add Svvptc extension support
Alexandre Ghiti
2024-10-02
target/riscv: Add textra matching condition for the triggers
Alvin Chang
2024-10-02
target/riscv: Preliminary textra trigger CSR writting support
Alvin Chang
2024-10-02
target/riscv/cpu.c: Add 'fcsr' register to QEMU log as a part of F extension
Maria Klauchek
2024-10-02
target/riscv: Stop timer with infinite timecmp
Andrew Jones
2024-10-02
target/riscv/kvm: Fix the group bit setting of AIA
Andrew Jones
2024-10-02
target: riscv: Enable Bit Manip for OpenTitan Ibex CPU
Alistair Francis
2024-10-02
target/riscv: fix za64rs enabling
Vladimir Isaev
2024-10-02
target/riscv/tcg/tcg-cpu.c: consider MISA bit choice in implied rule
Daniel Henrique Barboza
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