slackcoder/qemu - QEMU is a generic and open source machine & userspace emulator and virtualizer

Age	Commit message (Expand)	Author
2022-01-04	target/ppc: do not call hreg_compute_hflags() in helper_store_mmcr0()	Daniel Henrique Barboza
2022-01-04	target/ppc: Use env->pnc_cyc_cnt	Richard Henderson
2022-01-04	target/ppc: Rewrite pmu_increment_insns	Richard Henderson
2022-01-04	target/ppc: Cache per-pmc insn and cycle count settings	Richard Henderson
2022-01-04	target/ppc: powerpc_excp: Stop passing excp_model around	Fabiano Rosas
2022-01-04	target/ppc: powerpc_excp: Move system call vectored code together	Fabiano Rosas
2022-01-04	target/ppc: powerpc_excp: Set vector earlier	Fabiano Rosas
2022-01-04	target/ppc: powerpc_excp: Add excp_vectors bounds check	Fabiano Rosas
2022-01-04	target/ppc: powerpc_excp: Set alternate SRRs directly	Fabiano Rosas
2022-01-04	target/ppc: do not silence snan in xscvspdpn	Matheus Ferst
2022-01-04	ppc/ppc405: Dump specific registers	Cédric Le Goater
2022-01-04	ppc/ppc405: Introduce a store helper for SPR_40x_PID	Cédric Le Goater
2022-01-04	ppc/ppc405: Restore TCR and STR write handlers	Cédric Le Goater
2022-01-04	ppc/ppc405: Activate MMU logs	Cédric Le Goater
2022-01-04	target/ppc: Print out literal exception names in logs	Cédric Le Goater
2022-01-04	target/ppc: Remove static inline	Cédric Le Goater
2022-01-04	target/ppc: Check effective address validity	Cédric Le Goater
2022-01-04	target/ppc: Improve logging in Radix MMU	Cédric Le Goater
2021-12-30	target/hppa: Fix atomic_store_3 for STBY	Richard Henderson
2021-12-23	target/hppa: Fix deposit assert from trans_shrpw_imm	Richard Henderson
2021-12-20	target/riscv: Enable bitmanip Zb[abcs] instructions	Vineet Gupta
2021-12-20	target/riscv: rvv-1.0: Add ELEN checks for widening and narrowing instructions	Frank Chang
2021-12-20	target/riscv: rvv-1.0: update opivv_vadc_check() comment	Frank Chang
2021-12-20	target/riscv: rvv-1.0: rename vmandnot.mm and vmornot.mm to vmandn.mm and vmo...	Frank Chang
2021-12-20	target/riscv: rvv-1.0: add vector unit-stride mask load/store insns	Frank Chang
2021-12-20	target/riscv: rvv-1.0: add evl parameter to vext_ldst_us()	Frank Chang
2021-12-20	target/riscv: rvv-1.0: add vsetivli instruction	Frank Chang
2021-12-20	target/riscv: rvv-1.0: rename r2_zimm to r2_zimm11	Frank Chang
2021-12-20	target/riscv: rvv-1.0: floating-point reciprocal estimate instruction	Frank Chang
2021-12-20	target/riscv: rvv-1.0: floating-point reciprocal square-root estimate instruc...	Frank Chang
2021-12-20	target/riscv: gdb: support vector registers for rv64 & rv32	Hsiangkai Wang
2021-12-20	target/riscv: rvv-1.0: trigger illegal instruction exception if frm is not valid	Frank Chang
2021-12-20	target/riscv: rvv-1.0: implement vstart CSR	Frank Chang
2021-12-20	target/riscv: rvv-1.0: relax RV_VLEN_MAX to 1024-bits	Frank Chang
2021-12-20	target/riscv: rvv-1.0: narrowing floating-point/integer type-convert	Frank Chang
2021-12-20	target/riscv: add "set round to odd" rounding mode helper function	Frank Chang
2021-12-20	target/riscv: rvv-1.0: widening floating-point/integer type-convert	Frank Chang
2021-12-20	target/riscv: rvv-1.0: floating-point/integer type-convert instructions	Frank Chang
2021-12-20	target/riscv: introduce floating-point rounding mode enum	Frank Chang
2021-12-20	target/riscv: rvv-1.0: floating-point min/max instructions	Frank Chang
2021-12-20	target/riscv: rvv-1.0: remove integer extract instruction	Frank Chang
2021-12-20	target/riscv: rvv-1.0: remove vmford.vv and vmford.vf	Frank Chang
2021-12-20	target/riscv: rvv-1.0: remove widening saturating scaled multiply-add	Frank Chang
2021-12-20	target/riscv: rvv-1.0: single-width scaling shift instructions	Frank Chang
2021-12-20	target/riscv: rvv-1.0: widening floating-point reduction instructions	Frank Chang
2021-12-20	target/riscv: rvv-1.0: single-width floating-point reduction	Frank Chang
2021-12-20	target/riscv: rvv-1.0: narrowing fixed-point clip instructions	Frank Chang
2021-12-20	target/riscv: rvv-1.0: floating-point slide instructions	Frank Chang
2021-12-20	target/riscv: rvv-1.0: slide instructions	Frank Chang
2021-12-20	target/riscv: rvv-1.0: mask-register logical instructions	Frank Chang