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2022-01-21target/riscv: Create current pm fields in envLIU Zhiwei
2022-01-21target/riscv: Adjust csr write mask with XLENLIU Zhiwei
2022-01-21target/riscv: Relax debug check for pm writeLIU Zhiwei
2022-01-21target/riscv: Use gdb xml according to max mxlenLIU Zhiwei
2022-01-21target/riscv: Extend pc for runtime pc writeLIU Zhiwei
2022-01-21target/riscv: Ignore the pc bits above XLENLIU Zhiwei
2022-01-21target/riscv: Create xl field in envLIU Zhiwei
2022-01-21target/riscv: Sign extend pc for different XLENLIU Zhiwei
2022-01-21target/riscv: Sign extend link reg for jal and jalrLIU Zhiwei
2022-01-21target/riscv: Don't save pc when exception returnLIU Zhiwei
2022-01-21target/riscv: Adjust pmpcfg access with mxlLIU Zhiwei
2022-01-21target/riscv: rvv-1.0: Allow Zve32f extension to be turned onFrank Chang
2022-01-21target/riscv: rvv-1.0: Add Zve32f support for narrowing type-convert insnsFrank Chang
2022-01-21target/riscv: rvv-1.0: Add Zve32f support for widening type-convert insnsFrank Chang
2022-01-21target/riscv: rvv-1.0: Add Zve32f support for single-width fp reduction insnsFrank Chang
2022-01-21target/riscv: rvv-1.0: Add Zve32f support for scalar fp insnsFrank Chang
2022-01-21target/riscv: rvv-1.0: Add Zve32f support for configuration insnsFrank Chang
2022-01-21target/riscv: rvv-1.0: Add Zve32f extension into RISC-VFrank Chang
2022-01-21target/riscv: rvv-1.0: Allow Zve64f extension to be turned onFrank Chang
2022-01-21target/riscv: rvv-1.0: Add Zve64f support for narrowing type-convert insnsFrank Chang
2022-01-21target/riscv: rvv-1.0: Add Zve64f support for widening type-convert insnsFrank Chang
2022-01-21target/riscv: rvv-1.0: Add Zve64f support for single-width fp reduction insnsFrank Chang
2022-01-21target/riscv: rvv-1.0: Add Zve64f support for scalar fp insnsFrank Chang
2022-01-21target/riscv: rvv-1.0: Add Zve64f support for vsmul.vv and vsmul.vx insnsFrank Chang
2022-01-21target/riscv: rvv-1.0: Add Zve64f support for vmulh variant insnsFrank Chang
2022-01-21target/riscv: rvv-1.0: Add Zve64f support for load and store insnsFrank Chang
2022-01-21target/riscv: rvv-1.0: Add Zve64f support for configuration insnsFrank Chang
2022-01-21target/riscv: rvv-1.0: Add Zve64f extension into RISC-VFrank Chang
2022-01-21target/riscv: Support virtual time context synchronizationYifei Jiang
2022-01-21target/riscv: Implement virtual time adjusting with vm state changingYifei Jiang
2022-01-21target/riscv: Add kvm_riscv_get/put_regs_timerYifei Jiang
2022-01-21target/riscv: Add host cpu typeYifei Jiang
2022-01-21target/riscv: Handle KVM_EXIT_RISCV_SBI exitYifei Jiang
2022-01-21target/riscv: Support setting external interrupt by KVMYifei Jiang
2022-01-21target/riscv: Support start kernel directly by KVMYifei Jiang
2022-01-21target/riscv: Implement kvm_arch_put_registersYifei Jiang
2022-01-21target/riscv: Implement kvm_arch_get_registersYifei Jiang
2022-01-21target/riscv: Implement function kvm_arch_init_vcpuYifei Jiang
2022-01-21target/riscv: Add target/riscv/kvm.c to place the public kvm interfaceYifei Jiang
2022-01-20hw/arm/virt: KVM: Enable PAuth when supported by the hostMarc Zyngier
2022-01-19Merge remote-tracking branch 'remotes/thuth-gitlab/tags/pull-request-2022-01-...Peter Maydell
2022-01-18s390x: sigp: Reorder the SIGP STOP codeEric Farman
2022-01-18target/ppc: Fix 7448 supportCédric Le Goater
2022-01-18target/ppc: Finish removal of 401/403 CPUsCédric Le Goater
2022-01-18target/ppc: Remove last user of .load_state_oldCédric Le Goater
2022-01-17target/s390x: Fix shifting 32-bit values for more than 31 bitsIlya Leoshkevich
2022-01-17target/s390x: Fix cc_calc_sla_64() missing overflowsIlya Leoshkevich
2022-01-17target/s390x: Fix SRDA CC calculationIlya Leoshkevich
2022-01-17target/s390x: Fix SLDA sign bit indexIlya Leoshkevich
2022-01-13Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream' into ...Peter Maydell