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AgeCommit message (Expand)Author
2023-09-21target/arm: Implement the SET* instructionsPeter Maydell
2023-09-21target/arm: Implement MTE tag-checking functions for FEAT_MOPSPeter Maydell
2023-09-21target/arm: New function allocation_tag_mem_probe()Peter Maydell
2023-09-21target/arm: Define syndrome function for MOPS exceptionsPeter Maydell
2023-09-21target/arm: Pass unpriv bool to get_a64_user_mem_index()Peter Maydell
2023-09-21target/arm: Implement FEAT_MOPS enable bitsPeter Maydell
2023-09-21target/arm: Don't skip MTE checks for LDRT/STRT at EL0Peter Maydell
2023-09-21target/arm: Remove unused allocation_tag_mem() argumentPeter Maydell
2023-09-21target/arm: Implement FEAT_HBCPeter Maydell
2023-09-21target/arm: Update user-mode ID reg mask valuesPeter Maydell
2023-09-21target/arm: Update AArch64 ID register field definitionsPeter Maydell
2023-09-21Merge tag 'pull-trivial-patches' of https://gitlab.com/mjt0k/qemu into stagingStefan Hajnoczi
2023-09-21target/m68k: Add URL to semihosting specPeter Maydell
2023-09-21target/i386: Export GDS_NO bit to guestsPawan Gupta
2023-09-21target/i386: enumerate bit 56 of MSR_IA32_VMX_BASICPaolo Bonzini
2023-09-20Merge tag 'pull-loongarch-20230920' of https://gitlab.com/gaosong/qemu into s...Stefan Hajnoczi
2023-09-20Merge tag 'hppa-btlb-pull-request' of https://github.com/hdeller/qemu-hppa in...Stefan Hajnoczi
2023-09-20target/loongarch: CPUCFG support LASXSong Gao
2023-09-20target/loongarch: Move simply DO_XX marcos togtherSong Gao
2023-09-20target/loongarch: Implement xvld xvstSong Gao
2023-09-20target/loongarch: Implement xvshuf xvperm{i} xvshuf4iSong Gao
2023-09-20target/loongarch: Implement xvpack xvpick xvilv{l/h}Song Gao
2023-09-20target/loongarch: Implement xvreplve xvinsve0 xvpickveSong Gao
2023-09-20target/loongarch: Implement xvinsgr2vr xvpickve2grSong Gao
2023-09-20target/loongarch: Implement xvbitsel xvsetSong Gao
2023-09-20target/loongarch: Implement xvfcmpSong Gao
2023-09-20target/loongarch: Implement xvseq xvsle xvsltSong Gao
2023-09-20target/loongarch: Implement LASX fpu fcvt instructionsSong Gao
2023-09-20target/loongarch: Implement LASX fpu arith instructionsSong Gao
2023-09-20target/loongarch: Implement xvfrstpSong Gao
2023-09-20target/loongarch: Implement xvbitclr xvbitset xvbitrevSong Gao
2023-09-20target/loongarch: Implement xvpcntSong Gao
2023-09-20target/loongarch: Implement xvclo xvclzSong Gao
2023-09-20target/loongarch: Implement xvssrlrn xvssrarnSong Gao
2023-09-20target/loongarch: Implement xvssrln xvssranSong Gao
2023-09-20target/loongarch: Implement xvsrlrn xvsrarnSong Gao
2023-09-20target/loongarch: Implement xvsrln xvsranSong Gao
2023-09-20target/loongarch: Implement xvsrlr xvsrarSong Gao
2023-09-20target/loongarch: Implement xvsllwil xvextlSong Gao
2023-09-20target/loongarch: Implement xvsll xvsrl xvsra xvrotrSong Gao
2023-09-20target/loongarch: Implement LASX logic instructionsSong Gao
2023-09-20target/loongarch: Implement xvldiSong Gao
2023-09-20i386: spelling fixesMichael Tokarev
2023-09-20ppc: spelling fixesMichael Tokarev
2023-09-20target/loongarch: Implement xvmskltz/xvmskgez/xvmsknzSong Gao
2023-09-20target/loongarch: Implement xvsigncovSong Gao
2023-09-20target/loongarch: Implement vext2xvSong Gao
2023-09-20target/loongarch: Implement xvexthSong Gao
2023-09-20target/loongarch: Implement xvsatSong Gao
2023-09-20target/loongarch; Implement xvdiv/xvmodSong Gao