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2023-10-12target/riscv/cpu.c: add riscv_cpu_add_qdev_prop_array()Daniel Henrique Barboza
The code inside riscv_cpu_add_user_properties() became quite repetitive after recent changes. Add a helper to hide the repetition away. Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20230912132423.268494-8-dbarboza@ventanamicro.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2023-10-12target/riscv/cpu.c: split vendor exts from riscv_cpu_extensions[]Daniel Henrique Barboza
Our goal is to make riscv_cpu_extensions[] hold only ratified, non-vendor extensions. Create a new riscv_cpu_vendor_exts[] array for them, changing riscv_cpu_add_user_properties() and riscv_cpu_add_kvm_properties() accordingly. Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Message-ID: <20230912132423.268494-7-dbarboza@ventanamicro.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2023-10-12target/riscv/cpu.c: split non-ratified exts from riscv_cpu_extensions[]Daniel Henrique Barboza
Create a new riscv_cpu_experimental_exts[] to store the non-ratified extensions properties. Once they are ratified we'll move them back to riscv_cpu_extensions[]. riscv_cpu_add_user_properties() and riscv_cpu_add_kvm_properties() are changed to keep adding non-ratified properties to users. Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Message-ID: <20230912132423.268494-6-dbarboza@ventanamicro.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2023-10-12target/riscv: add DEFINE_PROP_END_OF_LIST() to riscv_cpu_options[]Daniel Henrique Barboza
Add DEFINE_PROP_END_OF_LIST() and eliminate the ARRAY_SIZE() usage when iterating in the riscv_cpu_options[] array, making it similar to what we already do when working with riscv_cpu_extensions[]. We also have a more sophisticated motivation behind this change. In the future we might need to export riscv_cpu_options[] to other files, and ARRAY_LIST() doesn't work properly in that case because the array size isn't exposed to the header file. Here's a future sight of what we would deal with: ./target/riscv/kvm.c:1057:5: error: nested extern declaration of 'riscv_cpu_add_misa_properties' [-Werror=nested-externs] n file included from ../target/riscv/kvm.c:19: home/danielhb/work/qemu/include/qemu/osdep.h:473:31: error: invalid application of 'sizeof' to incomplete type 'const RISCVCPUMultiExtConfig[]' 473 | #define ARRAY_SIZE(x) ((sizeof(x) / sizeof((x)[0])) + \ | ^ ./target/riscv/kvm.c:1047:29: note: in expansion of macro 'ARRAY_SIZE' 1047 | for (int i = 0; i < ARRAY_SIZE(_array); i++) { \ | ^~~~~~~~~~ ./target/riscv/kvm.c:1059:5: note: in expansion of macro 'ADD_UNAVAIL_KVM_PROP_ARRAY' 1059 | ADD_UNAVAIL_KVM_PROP_ARRAY(obj, riscv_cpu_extensions); | ^~~~~~~~~~~~~~~~~~~~~~~~~~ home/danielhb/work/qemu/include/qemu/osdep.h:473:31: error: invalid application of 'sizeof' to incomplete type 'const RISCVCPUMultiExtConfig[]' 473 | #define ARRAY_SIZE(x) ((sizeof(x) / sizeof((x)[0])) + \ | ^ ./target/riscv/kvm.c:1047:29: note: in expansion of macro 'ARRAY_SIZE' 1047 | for (int i = 0; i < ARRAY_SIZE(_array); i++) { \ Homogenize the present and change the future by using DEFINE_PROP_END_OF_LIST() in riscv_cpu_options[]. Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20230912132423.268494-5-dbarboza@ventanamicro.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2023-10-12target/riscv/cpu.c: split kvm prop handling to its own helperDaniel Henrique Barboza
Future patches will split the existing Property arrays even further, and the existing code in riscv_cpu_add_user_properties() will start to scale bad with it because it's dealing with KVM constraints mixed in with TCG constraints. We're going to pay a high price to share a couple of common lines of code between the two. Create a new kvm_riscv_cpu_add_kvm_properties() helper that will be forked from riscv_cpu_add_user_properties() if we're running KVM. The helper includes all properties that a KVM CPU will add. The rest of riscv_cpu_add_user_properties() body will then be relieved from having to deal with KVM constraints. The helper was declared in kvm_stubs.h, while being implemented in cpu.c, to allow '--enable-debug' builds to work. The compiler won't remove the kvm_riscv_cpu_add_kvm_properties() reference when 'kvm_enabled()' is false if we end up with an unused function. Even though being a KVM only helper we can't implement it in kvm.c due to its many dependencies inside cpu.c, so make it public in kvm_riscv.h and keep its implementation in cpu.c for now. We'll move it to kvm.c in the near future. Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Message-ID: <20230912132423.268494-4-dbarboza@ventanamicro.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2023-10-12target/riscv/cpu.c: skip 'bool' check when filtering KVM propsDaniel Henrique Barboza
After the introduction of riscv_cpu_options[] all properties in riscv_cpu_extensions[] are booleans. This check is now obsolete. Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Message-ID: <20230912132423.268494-3-dbarboza@ventanamicro.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2023-10-12target/riscv/cpu.c: split CPU options from riscv_cpu_extensions[]Daniel Henrique Barboza
We'll add a new CPU type that will enable a considerable amount of extensions. To make it easier for us we'll do a few cleanups in our existing riscv_cpu_extensions[] array. Start by splitting all CPU non-boolean options from it. Create a new riscv_cpu_options[] array for them. Add all these properties in riscv_cpu_add_user_properties() as it is already being done today. 'mmu' and 'pmp' aren't really extensions in the usual way we think about RISC-V extensions. These are closer to CPU features/options, so move both to riscv_cpu_options[] too. In the near future we'll need to match all extensions with all entries in isa_edata_arr[], and so it happens that both 'mmu' and 'pmp' do not have a riscv,isa string (thus, no priv spec version restriction). This further emphasizes the point that these are more a CPU option than an extension. No functional changes made. Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Weiwei Li <liweiwei@iscas.ac.cn> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Message-ID: <20230912132423.268494-2-dbarboza@ventanamicro.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2023-10-11target/sh4: Disable decode_gusa when plugins enabledRichard Henderson
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20230824181233.1568795-3-richard.henderson@linaro.org> [AJB: fixed s/cpu_env/tcg_env/ during re-base] Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20231009164104.369749-22-alex.bennee@linaro.org>
2023-10-11target/ppc: Remove references to gdb_has_xmlAkihiko Odaki
GDB has XML support since 6.7 which was released in 2007. It's time to remove support for old GDB versions without XML support. Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com> Message-Id: <20230912224107.29669-11-akihiko.odaki@daynix.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20231009164104.369749-18-alex.bennee@linaro.org>
2023-10-11target/arm: Remove references to gdb_has_xmlAkihiko Odaki
GDB has XML support since 6.7 which was released in 2007. It's time to remove support for old GDB versions without XML support. Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com> Acked-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20230912224107.29669-10-akihiko.odaki@daynix.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20231009164104.369749-17-alex.bennee@linaro.org>
2023-10-11hw/core/cpu: Return static value with gdb_arch_name()Akihiko Odaki
All implementations of gdb_arch_name() returns dynamic duplicates of static strings. It's also unlikely that there will be an implementation of gdb_arch_name() that returns a truly dynamic value due to the nature of the function returning a well-known identifiers. Qualify the value gdb_arch_name() with const and make all of its implementations return static strings. Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20230912224107.29669-8-akihiko.odaki@daynix.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20231009164104.369749-15-alex.bennee@linaro.org>
2023-10-11target/arm: Move the reference to arm-core.xmlAkihiko Odaki
Some subclasses overwrite gdb_core_xml_file member but others don't. Always initialize the member in the subclasses for consistency. This especially helps for AArch64; in a following change, the file specified by gdb_core_xml_file is always looked up even if it's going to be overwritten later. Looking up arm-core.xml results in an error as it will not be embedded in the AArch64 build. Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20230912224107.29669-7-akihiko.odaki@daynix.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20231009164104.369749-14-alex.bennee@linaro.org>
2023-10-09Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into stagingStefan Hajnoczi
* util/log: re-allow switching away from stderr log file * finish audio configuration rework * cleanup HVF stubs * remove more mentions of softmmu # -----BEGIN PGP SIGNATURE----- # # iQFIBAABCAAyFiEE8TM4V0tmI4mGbHaCv/vSX3jHroMFAmUi/kIUHHBib256aW5p # QHJlZGhhdC5jb20ACgkQv/vSX3jHroOXWwf/YW16QMzqdAPVHYRf9NcCneRF16El # t3lEod0q0sHhchPbh9e04aKbh+oBNeWu9sFyTl11Fwsi+DGmp/b28ziva75/4rfd # h5N9aX/z2jwPqy93IwPDu3soKXCCgTK+ywtD/5GLQwBGqxs7W2xUEEb7eCnVefHa # zwL3MOUqPICeqOnR1TNw9k3N3veF04D+rmchTwbAjAmx1f8EI+mK9VlGK9V8TUjP # 3HjpZYJluc0a92lR5VONJ7V25QfttsjLysTgpFwVAQPS6Frzatc/hWclfLYgw9vl # 2Irk83FV8gXPRl0XKNcqSDsv6h/yGP6TDFIB8QwRSRGBqIQi5aOlfBJzsQ== # =qbm7 # -----END PGP SIGNATURE----- # gpg: Signature made Sun 08 Oct 2023 15:08:50 EDT # gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83 # gpg: issuer "pbonzini@redhat.com" # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full] # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full] # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * tag 'for-upstream' of https://gitlab.com/bonzini/qemu: (25 commits) audio, qtest: get rid of QEMU_AUDIO_DRV audio: reintroduce default audio backend for VNC audio: do not use first -audiodev as default audio device audio: extend -audio to allow creating a default backend audio: extract audio_define_default audio: disable default backends if -audio/-audiodev is used audio: error hints need a trailing \n cutils: squelch compiler warnings with custom paths configure: change $softmmu to $system system: Rename softmmu/ directory as system/ meson: Rename target_softmmu_arch -> target_system_arch meson: Rename softmmu_mods -> system_mods target/i386: Rename i386_softmmu_kvm_ss -> i386_kvm_ss semihosting: Rename softmmu_FOO_user() -> uaccess_FOO_user() gdbstub: Rename 'softmmu' -> 'system' accel: Rename accel_softmmu* -> accel_system* tcg: Correct invalid mentions of 'softmmu' by 'system-mode' fuzz: Correct invalid mentions of 'softmmu' by 'system' cpu: Correct invalid mentions of 'softmmu' by 'system-mode' travis-ci: Correct invalid mentions of 'softmmu' by 'system' ... Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2023-10-07meson: Rename target_softmmu_arch -> target_system_archPhilippe Mathieu-Daudé
Finish the convertion started with commit de6cd7599b ("meson: Replace softmmu_ss -> system_ss"). If the $target_type is 'system', then use the target_system_arch[] source set :) Mechanical change doing: $ sed -i -e s/target_softmmu_arch/target_system_arch/g \ $(git grep -l target_softmmu_arch) Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20231004090629.37473-13-philmd@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2023-10-07target/i386: Rename i386_softmmu_kvm_ss -> i386_kvm_ssPhilippe Mathieu-Daudé
Software MMU is TCG specific. Here 'softmmu' is misused for system emulation. Anyhow, since KVM is system emulation specific, just rename as 'i386_kvm_ss'. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20231004090629.37473-10-philmd@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2023-10-07semihosting: Rename softmmu_FOO_user() -> uaccess_FOO_user()Philippe Mathieu-Daudé
Add a check in 'softmmu-uaccess.h' that the header is only include in system emulation, and rename it as 'uaccess.h'. Rename the API methods: - softmmu_[un]lock_user*() -> uaccess_[un]lock_user*() - softmmu_strlen_user() -> uaccess_strlen_user(). Update a pair of comments. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20231004090629.37473-9-philmd@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2023-10-07tcg: Correct invalid mentions of 'softmmu' by 'system-mode'Philippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20231004090629.37473-6-philmd@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2023-10-07target/i386: Check for USER_ONLY definition instead of SOFTMMU onePhilippe Mathieu-Daudé
Since we *might* have user emulation with softmmu, replace the system emulation check by !user emulation one. (target/ was cleaned from invalid CONFIG_SOFTMMU uses at commit cab35c73be, but these files were merged few days after, thus missed the cleanup.) Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20231004082239.27251-1-philmd@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2023-10-07sysemu/kvm: Restrict hvf_get_supported_cpuid() to x86 targetsPhilippe Mathieu-Daudé
hvf_get_supported_cpuid() is only defined for x86 targets (in target/i386/hvf/x86_cpuid.c). Its declaration is pointless on all other targets. All the calls to it in target/i386/cpu.c are guarded by a call on hvf_enabled(), so are elided when HVF is not built in. Therefore we can remove the unnecessary function stub. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20231004092510.39498-3-philmd@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2023-10-07target/i386/hvf: Remove unused includes in 'hvf-i386.h'Philippe Mathieu-Daudé
The only non standard type -- CPUArchState -- is forward declared in "qemu/typedefs.h", so no particular header is required here. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Roman Bolshakov <roman@roolebo.dev> Tested-by: Roman Bolshakov <roman@roolebo.dev> Message-ID: <20231004092510.39498-2-philmd@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2023-10-06target/ppc: Clean up local variable shadowing in kvm_arch_*_registers()Cédric Le Goater
Remove extra 'i' variable to fix this warning : ../target/ppc/kvm.c: In function ‘kvm_arch_put_registers’: ../target/ppc/kvm.c:963:13: warning: declaration of ‘i’ shadows a previous local [-Wshadow=compatible-local] 963 | int i; | ^ ../target/ppc/kvm.c:906:9: note: shadowed declaration is here 906 | int i; | ^ ../target/ppc/kvm.c: In function ‘kvm_arch_get_registers’: ../target/ppc/kvm.c:1265:13: warning: declaration of ‘i’ shadows a previous local [-Wshadow=compatible-local] 1265 | int i; | ^ ../target/ppc/kvm.c:1212:9: note: shadowed declaration is here 1212 | int i, ret; | ^ Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-ID: <20231006053526.1031252-1-clg@kaod.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com>
2023-10-06target/ppc: Rename variables to avoid local variable shadowing in VUPKPXCédric Le Goater
and fix such warnings : ../target/ppc/int_helper.c: In function ‘helper_vupklpx’: ../target/ppc/int_helper.c:2025:21: warning: declaration of ‘r’ shadows a parameter [-Wshadow=local] 2025 | uint8_t r = (e >> 10) & 0x1f; \ | ^ ../target/ppc/int_helper.c:2033:1: note: in expansion of macro ‘VUPKPX’ 2033 | VUPKPX(lpx, UPKLO) | ^~~~~~ ../target/ppc/int_helper.c:2017:41: note: shadowed declaration is here 2017 | void helper_vupk##suffix(ppc_avr_t *r, ppc_avr_t *b) \ | ~~~~~~~~~~~^ ../target/ppc/int_helper.c:2033:1: note: in expansion of macro ‘VUPKPX’ 2033 | VUPKPX(lpx, UPKLO) | ^~~~~~ Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-ID: <20230929083143.234553-1-clg@kaod.org> Reviewed-by: Michael Tokarev <mjt@tls.msk.ru> Signed-off-by: Markus Armbruster <armbru@redhat.com>
2023-10-04accel/tcg: Remove cpu_set_cpustate_pointersRichard Henderson
This function is now empty, so remove it. In the case of m68k and tricore, this empties the class instance initfn, so remove those as well. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-10-04accel/tcg: Replace CPUState.env_ptr with cpu_env()Richard Henderson
Reviewed-by: Anton Johansson <anjo@rev.ng> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-10-03tcg: Rename cpu_env to tcg_envRichard Henderson
Allow the name 'cpu_env' to be used for something else. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-10-03accel/tcg: Move CPUNegativeOffsetState into CPUStateRichard Henderson
Retain the separate structure to emphasize its importance. Enforce CPUArchState always follows CPUState without padding. Reviewed-by: Anton Johansson <anjo@rev.ng> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-10-03target/*: Add instance_align to all cpu base classesRichard Henderson
The omission of alignment has technically been wrong since 269bd5d8f61, where QEMU_ALIGNED was added to CPUTLBDescFast. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-10-03target/arm: Remove size and alignment for cpu subclassesRichard Henderson
Inherit the size and alignment from TYPE_ARM_CPU. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-10-03target/arm: Replace TARGET_PAGE_ENTRY_EXTRAAnton Johansson
TARGET_PAGE_ENTRY_EXTRA is a macro that allows guests to specify additional fields for caching with the full TLB entry. This macro is replaced with a union in CPUTLBEntryFull, thus making CPUTLB target-agnostic at the cost of slightly inflated CPUTLBEntryFull for non-arm guests. Note, this is needed to ensure that fields in CPUTLB don't vary in offset between various targets. (arm is the only guest actually making use of this feature.) Signed-off-by: Anton Johansson <anjo@rev.ng> Message-Id: <20230912153428.17816-2-anjo@rev.ng> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-10-03accel: Rename accel_cpu_realize() -> accel_cpu_common_realize()Philippe Mathieu-Daudé
accel_cpu_realize() is a generic function working with CPUs from any target. Rename it using '_common_' to emphasis it is not target specific. Suggested-by: Claudio Fontana <cfontana@suse.de> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20231003123026.99229-4-philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-10-03accel: Rename AccelCPUClass::cpu_realizefn() -> cpu_target_realize()Philippe Mathieu-Daudé
The AccelCPUClass::cpu_realizefn handler is meant for target specific code, rename it using '_target_' to emphasis it. Suggested-by: Claudio Fontana <cfontana@suse.de> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20231003123026.99229-3-philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-10-03accel: Rename accel_cpu_realizefn() -> accel_cpu_realize()Philippe Mathieu-Daudé
We use the '*fn' suffix for handlers, this is a public method. Drop the suffix. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Claudio Fontana <cfontana@suse.de> Message-Id: <20231003123026.99229-2-philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-10-02Merge tag 'pull-shadow-2023-09-29' of https://repo.or.cz/qemu/armbru into ↵Stefan Hajnoczi
staging -Wshadow=local patches patches for 2023-09-29 # -----BEGIN PGP SIGNATURE----- # # iQJGBAABCAAwFiEENUvIs9frKmtoZ05fOHC0AOuRhlMFAmUWhnsSHGFybWJydUBy # ZWRoYXQuY29tAAoJEDhwtADrkYZTDBkP/2E8cyH+fn7yehNAZT8fjBuDBaj0x3wf # Bs4++bMEZpgfA/11le/Mm+N9BFDtoGj4dnDwQ0yN6bcKcfmNvxh+M+lNaRO+xvXA # qs/kJtFYkJYuEj1wgKK2XXd4YcD/S4Qap+FSuUBv8KE/oeALkB1fEpvMcwtJtQqc # 7POQEqYNQfUe+MX/wKZ+qditbbrFRwX69dAd8+nGTbFestXd2uFA5I5kv3ebxELg # VjTBgQdp7s82iTvoXpTtmQ6A9ba13zmelxmsAMLlAihkbffMwbtbrkQ7qIIUOW1o # I4WPxhIXXyZbB48qARUq5G3GQuh+7dRArcpYWaFel2a6cjm2Z6NmWJeRAr0cIaWV # P5B79k7DO551YsBZn+ubH0U+qwMLw+zq2apQ+SeH/loE0pP/c2OBOPtaVI46D0Dh # 2kgaSuTIy9AByAHoYBxKnxy4TVwPKzk8hdzCQdiRSO7KJdMqMsV+/w1eR4oH9dsf # CAvJXVzLicFMMABA/4O99K+1yjIOQpwmiqAjc+gV6FdhwllSH3yQDiK4RMWNAwRu # bRQHBCk143t7cM3ts09T+5QxkWB3U0iGMJ4rpn43yjH5xwlWmpTlztvd7XlXwyTR # 8j2Z+8qxe992HmVk34rKdkGnu0qz4AhJBgAEEk2e0oepZvjfigqodQwEMCQsse5t # cH51HzTDuen/ # =XVKC # -----END PGP SIGNATURE----- # gpg: Signature made Fri 29 Sep 2023 04:10:35 EDT # gpg: using RSA key 354BC8B3D7EB2A6B68674E5F3870B400EB918653 # gpg: issuer "armbru@redhat.com" # gpg: Good signature from "Markus Armbruster <armbru@redhat.com>" [full] # gpg: aka "Markus Armbruster <armbru@pond.sub.org>" [full] # Primary key fingerprint: 354B C8B3 D7EB 2A6B 6867 4E5F 3870 B400 EB91 8653 * tag 'pull-shadow-2023-09-29' of https://repo.or.cz/qemu/armbru: (56 commits) disas/m68k: clean up local variable shadowing hw/nvme: Clean up local variable shadowing in nvme_ns_init() softmmu/device_tree: Fixup local variables shadowing target/riscv: vector_helper: Fixup local variables shadowing target/riscv: cpu: Fixup local variables shadowing hw/riscv: opentitan: Fixup local variables shadowing qemu-nbd: changes towards enabling -Wshadow=local seccomp: avoid shadowing of 'action' variable crypto: remove shadowed 'ret' variable intel_iommu: Fix shadow local variables on "size" aspeed/timer: Clean up local variable shadowing aspeed/i3c: Rename variable shadowing a local aspeed: Clean up local variable shadowing aspeed/i2c: Clean up local variable shadowing hw/arm/smmuv3-internal.h: Don't use locals in statement macros hw/arm/smmuv3.c: Avoid shadowing variable hw/misc/arm_sysctl.c: Avoid shadowing local variable hw/intc/arm_gicv3_its: Avoid shadowing variable in do_process_its_cmd() hw/acpi: changes towards enabling -Wshadow=local test-throttle: don't shadow 'index' variable in do_test_accounting() ... Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2023-10-02Merge tag 'pull-tricore-20230929' of https://github.com/bkoppelmann/qemu ↵Stefan Hajnoczi
into staging - Add FTOU, CRCN, FTOHP, and HPTOF insns # -----BEGIN PGP SIGNATURE----- # # iQJTBAABCgA9FiEEbmNqfoPy3Qz6bm43CtLGOWtpyhQFAmUWb2sfHGtiYXN0aWFu # QG1haWwudW5pLXBhZGVyYm9ybi5kZQAKCRAK0sY5a2nKFPn0D/0S+Zth2okyfe6H # YdoFB49PWlcafIvZHr1TDswp3LvSDnrjHLJfEW1Gx3mtDkw+/7uid0eMTQ8sDlxJ # t7spJdZDZ5dkm+9K5MzGkW0zo0jDY6kbS1A3HJRPcpJJJk4zBBL1K4KC1FBUD6IK # 7n41f5vExgWhIhOgZmT9WTMbBfh73/+Cu8h6M9RAI1VI0O6N5jOETpKTBFsPOx+A # Kd429cB1c9QeAj0iEXdMn2/Xg2cAII86jrOcYkLYltxir/r6Cia9hfp/F6OXpcZI # QqKzn11djvbCCL7m9OXhuI3ZP+TIcX7QOabSstfghHlNG1qs/RkXwIRqKHsfRXNG # nywBTjwIDSiZ4cbZVJ6OjXxbU9OBRkmDgh+SYEVMlFi4E+t3WeTMC8gxUsjfITpK # JXFoduN2P0yKRjkWQ2OSQ7xX4StFPikXBH1eC8RNnW4IY00wMiJ0tM/0+j+qJLLM # Ft/bceIZhnGs+axN0jF1EtR03uLZ0kmy3YqsH/KnBnufrag3ytpC/kAtl9Scd6m+ # N4pAT9cfgxqXv/yXAKGupoNPwPGvvSKV6XQTJt2Hn7PBadHWlvlBkgYqGIejpHDM # x9EghA8o4q5rTu9zTqBv36bOHJEDbJhmq5dYqJTS/q1ORjnWQQsLxv+6XGN3wrbb # OuexPdD8fH3mWrjeJJ3KDKojOYyGyg== # =gUyL # -----END PGP SIGNATURE----- # gpg: Signature made Fri 29 Sep 2023 02:32:11 EDT # gpg: using RSA key 6E636A7E83F2DD0CFA6E6E370AD2C6396B69CA14 # gpg: issuer "kbastian@mail.uni-paderborn.de" # gpg: Good signature from "Bastian Koppelmann <kbastian@mail.uni-paderborn.de>" [unknown] # gpg: WARNING: The key's User ID is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 6E63 6A7E 83F2 DD0C FA6E 6E37 0AD2 C639 6B69 CA14 * tag 'pull-tricore-20230929' of https://github.com/bkoppelmann/qemu: target/tricore: Change effective address (ea) to target_ulong target/tricore: Remove CSFRs from cpu.h tests/tcg: Reset result register after each test hw/tricore: Log failing test in testdevice tests/tcg/tricore: Extended and non-extened regs now match target/tricore: Fix FTOUZ being ISA v1.3.1 up target/tricore: Replace cpu_*_code with translator_* target/tricore: Swap src and dst reg for RCRR_INSERT target/tricore: Fix RCPW/RRPW_INSERT insns for width = 0 target/tricore: Implement hptof insn target/tricore: Implement ftohp insn target/tricore: Clarify special case for FTOUZ insn target/tricore: Implement FTOU insn target/tricore: Correctly handle FPU RM from PSW target/tricore: Implement CRCN insn tests/tcg/tricore: Bump cpu to tc37x Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2023-09-29target/riscv: vector_helper: Fixup local variables shadowingAlistair Francis
Local variables shadowing other local variables or parameters make the code needlessly hard to understand. Bugs love to hide in such code. Evidence: "[PATCH v3 1/7] migration/rdma: Fix save_page method to fail on polling error". This patch removes the local variable shadowing. Tested by adding: --extra-cflags='-Wshadow=local -Wno-error=shadow=local -Wno-error=shadow=compatible-local' To configure Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20230925043023.71448-4-alistair.francis@wdc.com> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Signed-off-by: Markus Armbruster <armbru@redhat.com>
2023-09-29target/riscv: cpu: Fixup local variables shadowingAlistair Francis
Local variables shadowing other local variables or parameters make the code needlessly hard to understand. Bugs love to hide in such code. Evidence: "[PATCH v3 1/7] migration/rdma: Fix save_page method to fail on polling error". This patch removes the local variable shadowing. Tested by adding: --extra-cflags='-Wshadow=local -Wno-error=shadow=local -Wno-error=shadow=compatible-local' To configure Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20230925043023.71448-3-alistair.francis@wdc.com> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Signed-off-by: Markus Armbruster <armbru@redhat.com>
2023-09-29target/tricore: Clean up local variable shadowingPhilippe Mathieu-Daudé
Fix: target/tricore/translate.c:5016:18: warning: declaration of ‘temp’ shadows a previous local [-Wshadow=compatible-local] 5016 | TCGv temp = tcg_constant_i32(const9); | ^~~~ target/tricore/translate.c:4958:10: note: shadowed declaration is here 4958 | TCGv temp; | ^~~~ Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20230904161235.84651-7-philmd@linaro.org> Reviewed-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Signed-off-by: Markus Armbruster <armbru@redhat.com>
2023-09-29target/m68k: Clean up local variable shadowingPhilippe Mathieu-Daudé
Fix: target/m68k/translate.c:828:18: error: declaration shadows a local variable [-Werror,-Wshadow] TCGv tmp = tcg_temp_new(); ^ target/m68k/translate.c:801:15: note: previous declaration is here TCGv reg, tmp, result; ^ Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-ID: <20230904161235.84651-6-philmd@linaro.org> Signed-off-by: Markus Armbruster <armbru@redhat.com>
2023-09-29target/mips: Clean up local variable shadowingPhilippe Mathieu-Daudé
Fix: target/mips/tcg/nanomips_translate.c.inc:4410:33: error: declaration shadows a local variable [-Werror,-Wshadow] int32_t imm = extract32(ctx->opcode, 1, 13) | ^ target/mips/tcg/nanomips_translate.c.inc:3577:9: note: previous declaration is here int imm; ^ target/mips/tcg/translate.c:15578:19: error: declaration shadows a local variable [-Werror,-Wshadow] for (unsigned i = 1; i < 32; i++) { ^ target/mips/tcg/translate.c:15567:9: note: previous declaration is here int i; ^ target/mips/tcg/msa_helper.c:7478:13: error: declaration shadows a local variable [-Werror,-Wshadow] MSA_FLOAT_MAXOP(pwx->w[0], min, pws->w[0], pws->w[0], 32); ^ target/mips/tcg/msa_helper.c:7434:23: note: expanded from macro 'MSA_FLOAT_MAXOP' float_status *status = &env->active_tc.msa_fp_status; ^ Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20230904161235.84651-5-philmd@linaro.org> Signed-off-by: Markus Armbruster <armbru@redhat.com>
2023-09-29target/arm/hvf: Clean up local variable shadowingPhilippe Mathieu-Daudé
Per Peter Maydell analysis [*]: The hvf_vcpu_exec() function is not documented, but in practice its caller expects it to return either EXCP_DEBUG (for "this was a guest debug exception you need to deal with") or something else (presumably the intention being 0 for OK). The hvf_sysreg_read() and hvf_sysreg_write() functions are also not documented, but they return 0 on success, or 1 for a completely unrecognized sysreg where we've raised the UNDEF exception (but not if we raised an UNDEF exception for an unrecognized GIC sysreg -- I think this is a bug). We use this return value to decide whether we need to advance the PC past the insn or not. It's not the same as the return value we want to return from hvf_vcpu_exec(). Retain the variable as locally scoped but give it a name that doesn't clash with the other function-scoped variable. This fixes: target/arm/hvf/hvf.c:1936:13: error: declaration shadows a local variable [-Werror,-Wshadow] int ret = 0; ^ target/arm/hvf/hvf.c:1807:9: note: previous declaration is here int ret; ^ [*] https://lore.kernel.org/qemu-devel/CAFEAcA_e+fU6JKtS+W63wr9cCJ6btu_hT_ydZWOwC0kBkDYYYQ@mail.gmail.com/ Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20230904161235.84651-4-philmd@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Markus Armbruster <armbru@redhat.com>
2023-09-29target/arm/tcg: Clean up local variable shadowingPhilippe Mathieu-Daudé
Fix: target/arm/tcg/translate-m-nocp.c: In function ‘gen_M_fp_sysreg_read’: target/arm/tcg/translate-m-nocp.c:509:18: warning: declaration of ‘tmp’ shadows a previous local [-Wshadow=compatible-local] 509 | TCGv_i32 tmp = load_cpu_field(v7m.fpdscr[M_REG_NS]); | ^~~ target/arm/tcg/translate-m-nocp.c:433:14: note: shadowed declaration is here 433 | TCGv_i32 tmp; | ^~~ --- target/arm/tcg/mve_helper.c: In function ‘helper_mve_vqshlsb’: target/arm/tcg/mve_helper.c:1259:19: warning: declaration of ‘r’ shadows a previous local [-Wshadow=compatible-local] 1259 | typeof(N) r = FN(N, (int8_t)(M), sizeof(N) * 8, ROUND, &su32); \ | ^ target/arm/tcg/mve_helper.c:1267:5: note: in expansion of macro ‘WRAP_QRSHL_HELPER’ 1267 | WRAP_QRSHL_HELPER(do_sqrshl_bhs, N, M, false, satp) | ^~~~~~~~~~~~~~~~~ target/arm/tcg/mve_helper.c:927:22: note: in expansion of macro ‘DO_SQSHL_OP’ 927 | TYPE r = FN(n[H##ESIZE(e)], m[H##ESIZE(e)], &sat); \ | ^~ target/arm/tcg/mve_helper.c:945:5: note: in expansion of macro ‘DO_2OP_SAT’ 945 | DO_2OP_SAT(OP##b, 1, int8_t, FN) \ | ^~~~~~~~~~ target/arm/tcg/mve_helper.c:1277:1: note: in expansion of macro ‘DO_2OP_SAT_S’ 1277 | DO_2OP_SAT_S(vqshls, DO_SQSHL_OP) | ^~~~~~~~~~~~ --- target/arm/tcg/mve_helper.c: In function ‘do_sqrshl48_d’: target/arm/tcg/mve_helper.c:2463:17: warning: declaration of ‘extval’ shadows a previous local [-Wshadow=compatible-local] 2463 | int64_t extval = sextract64(src << shift, 0, 48); | ^~~~~~ target/arm/tcg/mve_helper.c:2443:18: note: shadowed declaration is here 2443 | int64_t val, extval; | ^~~~~~ --- target/arm/tcg/mve_helper.c: In function ‘do_uqrshl48_d’: target/arm/tcg/mve_helper.c:2495:18: warning: declaration of ‘extval’ shadows a previous local [-Wshadow=compatible-local] 2495 | uint64_t extval = extract64(src << shift, 0, 48); | ^~~~~~ target/arm/tcg/mve_helper.c:2479:19: note: shadowed declaration is here 2479 | uint64_t val, extval; | ^~~~~~ Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20230904161235.84651-3-philmd@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Markus Armbruster <armbru@redhat.com>
2023-09-29target/tricore: Change effective address (ea) to target_ulongBastian Koppelmann
as this is an effective address and those cannot be signed, it should not be a signed integer. Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Message-ID: <20230913105326.40832-11-kbastian@mail.uni-paderborn.de>
2023-09-29target/tricore: Remove CSFRs from cpu.hBastian Koppelmann
these are already defined in 'csfr.h.inc'. We don't need to duplicate these registers. Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Message-ID: <20230913105326.40832-10-kbastian@mail.uni-paderborn.de>
2023-09-28accel/tcg: Always require can_do_ioRichard Henderson
Require i/o as the last insn of a TranslationBlock always, not only with icount. This is required for i/o that alters the address space, such as a pci config space write. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1866 Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-09-28target/tricore: Fix FTOUZ being ISA v1.3.1 upBastian Koppelmann
Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Message-ID: <20230828112651.522058-12-kbastian@mail.uni-paderborn.de>
2023-09-28target/tricore: Replace cpu_*_code with translator_*Bastian Koppelmann
Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Message-ID: <20230828112651.522058-11-kbastian@mail.uni-paderborn.de>
2023-09-28target/tricore: Swap src and dst reg for RCRR_INSERTBastian Koppelmann
Acked-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Message-ID: <20230828112651.522058-10-kbastian@mail.uni-paderborn.de>
2023-09-28target/tricore: Fix RCPW/RRPW_INSERT insns for width = 0Bastian Koppelmann
we would crash if width was 0 for these insns, as tcg_gen_deposit() is undefined for that case. For TriCore, width = 0 is a mov from the src reg to the dst reg, so we special case this here. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Message-ID: <20230828112651.522058-9-kbastian@mail.uni-paderborn.de>
2023-09-28target/tricore: Implement hptof insnBastian Koppelmann
Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1667 Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Message-ID: <20230828112651.522058-8-kbastian@mail.uni-paderborn.de>
2023-09-28target/tricore: Implement ftohp insnBastian Koppelmann
reported in https://gitlab.com/qemu-project/qemu/-/issues/1667 Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Message-ID: <20230828112651.522058-7-kbastian@mail.uni-paderborn.de>
generated by cgit v1.2.3 (git 2.26.2) at 2025-03-16 04:34:06 +0000