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2023-05-06target/loongarch: Implement vsigncovSong Gao
2023-05-06target/loongarch: Implement vexthSong Gao
2023-05-06target/loongarch: Implement vsatSong Gao
2023-05-06target/loongarch: Implement vdiv/vmodSong Gao
2023-05-06target/loongarch: Implement vmadd/vmsub/vmaddw{ev/od}Song Gao
2023-05-06target/loongarch: Implement vmul/vmuh/vmulw{ev/od}Song Gao
2023-05-06target/loongarch: Implement vmax/vminSong Gao
2023-05-06target/loongarch: Implement vaddaSong Gao
2023-05-06target/loongarch: Implement vabsdSong Gao
2023-05-06target/loongarch: Implement vavg/vavgrSong Gao
2023-05-06target/loongarch: Implement vaddw/vsubwSong Gao
2023-05-06target/loongarch: Implement vhaddw/vhsubwSong Gao
2023-05-06target/loongarch: Implement vsadd/vssubSong Gao
2023-05-06target/loongarch: Implement vnegSong Gao
2023-05-06target/loongarch: Implement vaddi/vsubiSong Gao
2023-05-06target/loongarch: Implement vadd/vsubSong Gao
2023-05-06target/loongarch: Add CHECK_SXE maccro for check LSX enableSong Gao
2023-05-06target/loongarch: meson.build support build LSXSong Gao
2023-05-06target/loongarch: Add LSX data type VRegSong Gao
2023-05-05Merge tag 'pull-tcg-20230505' of https://gitlab.com/rth7680/qemu into stagingRichard Henderson
2023-05-05target/sparc: Use cpu_ld*_code_mmuRichard Henderson
2023-05-05target/sparc: Use MO_ALIGN where requiredRichard Henderson
2023-05-05target/hppa: Use MO_ALIGN for system UNALIGN()Richard Henderson
2023-05-05target/alpha: Use MO_ALIGN where requiredRichard Henderson
2023-05-05target/alpha: Use MO_ALIGN for system UNALIGN()Richard Henderson
2023-05-05target/xtensa: Finish conversion to tcg_gen_qemu_{ld, st}_*Richard Henderson
2023-05-05target/sparc: Finish conversion to tcg_gen_qemu_{ld, st}_*Richard Henderson
2023-05-05target/s390x: Finish conversion to tcg_gen_qemu_{ld, st}_*Richard Henderson
2023-05-05target/mips: Finish conversion to tcg_gen_qemu_{ld,st}_*Richard Henderson
2023-05-05target/m68k: Finish conversion to tcg_gen_qemu_{ld,st}_*Richard Henderson
2023-05-05target/Hexagon: Finish conversion to tcg_gen_qemu_{ld, st}_*Richard Henderson
2023-05-05target/cris: Finish conversion to tcg_gen_qemu_{ld,st}_*Richard Henderson
2023-05-05target/avr: Finish conversion to tcg_gen_qemu_{ld,st}_*Richard Henderson
2023-05-05tcg: ppc64: Fix mask generation for vextractdmShivaprasad G Bhat
2023-05-05ppc: spapr: cleanup cr get/set with helpers.Harsh Prateek Bora
2023-05-05target/riscv: add Ventana's Veyron V1 CPURahul Pathak
2023-05-05riscv: Make sure an exception is raised if a pte is malformedAlexandre Ghiti
2023-05-05target/riscv: Fix Guest Physical Address TranslationIrina Ryapolova
2023-05-05target/riscv: Restore the predicate() NULL check behaviorBin Meng
2023-05-05target/riscv: add TYPE_RISCV_DYNAMIC_CPUDaniel Henrique Barboza
2023-05-05target/riscv: add query-cpy-definitions supportDaniel Henrique Barboza
2023-05-05target/riscv: add CPU QOM headerDaniel Henrique Barboza
2023-05-05target/riscv: Reorg sum check in get_physical_addressRichard Henderson
2023-05-05target/riscv: Reorg access check in get_physical_addressRichard Henderson
2023-05-05target/riscv: Merge checks for reserved pte flagsRichard Henderson
2023-05-05target/riscv: Don't modify SUM with is_debugRichard Henderson
2023-05-05target/riscv: Suppress pte update with is_debugRichard Henderson
2023-05-05target/riscv: Move leaf pte processing out of level loopRichard Henderson
2023-05-05target/riscv: Hoist pbmte and hade out of the level loopRichard Henderson
2023-05-05target/riscv: Hoist second stage mode change to callersRichard Henderson