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AgeCommit message (Expand)Author
2023-07-10target/riscv/kvm.c: update KVM MISA bitsDaniel Henrique Barboza
2023-07-10target/riscv: add KVM specific MISA propertiesDaniel Henrique Barboza
2023-07-10target/riscv/cpu: add misa_ext_info_arr[]Daniel Henrique Barboza
2023-07-10target/riscv/kvm.c: init 'misa_ext_mask' with scratch CPUDaniel Henrique Barboza
2023-07-10target/riscv: handle mvendorid/marchid/mimpid for KVM CPUsDaniel Henrique Barboza
2023-07-10target/riscv: read marchid/mimpid in kvm_riscv_init_machine_ids()Daniel Henrique Barboza
2023-07-10target/riscv: use KVM scratch CPUs to init KVM propertiesDaniel Henrique Barboza
2023-07-10target/riscv/cpu.c: restrict 'marchid' valueDaniel Henrique Barboza
2023-07-10target/riscv/cpu.c: restrict 'mimpid' valueDaniel Henrique Barboza
2023-07-10target/riscv/cpu.c: restrict 'mvendorid' valueDaniel Henrique Barboza
2023-07-10target/riscv: skip features setup for KVM CPUsDaniel Henrique Barboza
2023-07-10target/riscv KVM_RISCV_SET_TIMER macro is not configured correctlyyang.zhang
2023-07-10target/riscv: Set the correct exception for implict G-stage translation failJason Chien
2023-07-10target/riscv: Expose properties for BF16 extensionsWeiwei Li
2023-07-10target/riscv: Add support for Zvfbfwma extensionWeiwei Li
2023-07-10target/riscv: Add support for Zvfbfmin extensionWeiwei Li
2023-07-10target/riscv: Add support for Zfbfmin extensionWeiwei Li
2023-07-10target/riscv: Add properties for BF16 extensionsWeiwei Li
2023-07-10target/riscv: Add RVV registers to logIvan Klokov
2023-07-10target/riscv: update cur_pmbase/pmmask based on mode affected by MPRVWeiwei Li
2023-07-10target/riscv: Add additional xlen for address when MPRV=1Weiwei Li
2023-07-10target/riscv/cpu.c: fix veyron-v1 CPU propertiesDaniel Henrique Barboza
2023-07-10target/riscv: Remove redundant assignment to SXLWeiwei Li
2023-07-10target/riscv: Support MSTATUS.MPV/GVA only when RVH is enabledWeiwei Li
2023-07-10target/riscv: Make MPV only work when MPP != PRV_MWeiwei Li
2023-07-10disas/riscv: Add support for XThead* instructionsChristoph Müllner
2023-07-10target/riscv: Factor out extension tests to cpu_cfg.hChristoph Müllner
2023-07-10target/riscv: Use xl instead of mxl for disassembleLIU Zhiwei
2023-07-09Merge tag 'pull-tcg-20230709' of https://gitlab.com/rth7680/qemu into stagingRichard Henderson
2023-07-09target/riscv: Use aesdec_ISB_ISR_IMC_AKRichard Henderson
2023-07-09target/riscv: Use aesenc_SB_SR_MC_AKRichard Henderson
2023-07-09target/riscv: Use aesdec_IMCRichard Henderson
2023-07-09target/riscv: Use aesdec_ISB_ISR_AKRichard Henderson
2023-07-09target/riscv: Use aesenc_SB_SR_AKRichard Henderson
2023-07-09target/arm: Use aesdec_IMCRichard Henderson
2023-07-09target/arm: Use aesenc_MCRichard Henderson
2023-07-09target/arm: Use aesdec_ISB_ISR_AKRichard Henderson
2023-07-09target/arm: Use aesenc_SB_SR_AKRichard Henderson
2023-07-08target/arm: Demultiplex AESE and AESMCRichard Henderson
2023-07-08target/i386: Use aesdec_ISB_ISR_IMC_AKRichard Henderson
2023-07-08target/i386: Use aesenc_SB_SR_MC_AKRichard Henderson
2023-07-08target/i386: Use aesdec_IMCRichard Henderson
2023-07-08target/i386: Use aesdec_ISB_ISR_AKRichard Henderson
2023-07-08target/i386: Use aesenc_SB_SR_AKRichard Henderson
2023-07-08target/ppc: Use aesdec_ISB_ISR_AK_IMCRichard Henderson
2023-07-08target/ppc: Use aesenc_SB_SR_MC_AKRichard Henderson
2023-07-08target/ppc: Use aesdec_ISB_ISR_AKRichard Henderson
2023-07-08target/ppc: Use aesenc_SB_SR_AKRichard Henderson
2023-07-08target/arm: Move aesmc and aesimc tables to crypto/aes.cRichard Henderson
2023-07-08Merge tag 'trivial-patches-20230708' of https://gitlab.com/mjt0k/qemu into st...Richard Henderson
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