| Age | Commit message (Expand) | Author |
|---|
| 2023-05-18 | target/arm: Saturate L2CTLR_EL1 core count field rather than overflowing | Peter Maydell |
| 2023-05-18 | target/arm: Convert ERET, ERETAA, ERETAB to decodetree | Peter Maydell |
| 2023-05-18 | target/arm: Convert BRAA, BRAB, BLRAA, BLRAB to decodetree | Peter Maydell |
| 2023-05-18 | target/arm: Convert BRA[AB]Z, BLR[AB]Z, RETA[AB] to decodetree | Peter Maydell |
| 2023-05-18 | target/arm: Convert BR, BLR, RET to decodetree | Peter Maydell |
| 2023-05-18 | target/arm: Convert conditional branch insns to decodetree | Peter Maydell |
| 2023-05-18 | target/arm: Convert TBZ, TBNZ to decodetree | Peter Maydell |
| 2023-05-18 | target/arm: Convert CBZ, CBNZ to decodetree | Peter Maydell |
| 2023-05-18 | target/arm: Convert unconditional branch immediate to decodetree | Peter Maydell |
| 2023-05-18 | target/arm: Convert Extract instructions to decodetree | Peter Maydell |
| 2023-05-18 | target/arm: Convert Bitfield to decodetree | Richard Henderson |
| 2023-05-18 | target/arm: Convert Move wide (immediate) to decodetree | Richard Henderson |
| 2023-05-18 | target/arm: Convert Logical (immediate) to decodetree | Richard Henderson |
| 2023-05-18 | target/arm: Replace bitmask64 with MAKE_64BIT_MASK | Richard Henderson |
| 2023-05-18 | target/arm: Convert Add/subtract (immediate with tags) to decodetree | Richard Henderson |
| 2023-05-18 | target/arm: Convert Add/subtract (immediate) to decodetree | Richard Henderson |
| 2023-05-18 | target/arm: Split gen_add_CC and gen_sub_CC | Richard Henderson |
| 2023-05-18 | target/arm: Convert PC-rel addressing to decodetree | Richard Henderson |
| 2023-05-18 | target/arm: Pull calls to disas_sve() and disas_sme() out of legacy decoder | Peter Maydell |
| 2023-05-18 | target/arm: Create decodetree skeleton for A64 | Peter Maydell |
| 2023-05-18 | target/arm: Split out disas_a64_legacy | Richard Henderson |
| 2023-05-18 | target/arm: add RAZ/WI handling for DBGDTR[TX|RX] | Alex Bennée |
| 2023-05-18 | arm/kvm: add support for MTE | Cornelia Huck |
| 2023-05-18 | target/arm: Fix vd == vm overlap in sve_ldff1_z | Richard Henderson |
| 2023-05-16 | target/s390x: Fix EXECUTE of relative branches | Ilya Leoshkevich |
| 2023-05-16 | s390x/tcg: Fix LDER instruction format | Ilya Leoshkevich |
| 2023-05-16 | hw/core: Use a callback for target specific query-cpus-fast information | Thomas Huth |
| 2023-05-13 | Merge tag 'or1k-pull-request-20230513' of https://github.com/stffrdhrn/qemu i... | Richard Henderson |
| 2023-05-12 | target/arm: Correct AArch64.S2MinTxSZ 32-bit EL1 input size check | Peter Maydell |
| 2023-05-12 | target/arm: Select CONFIG_ARM_V7M when TCG is enabled | Fabiano Rosas |
| 2023-05-12 | target/arm: Select SEMIHOSTING when using TCG | Fabiano Rosas |
| 2023-05-12 | target/arm: Fix handling of SW and NSW bits for stage 2 walks | Peter Maydell |
| 2023-05-12 | target/arm: Don't allow stage 2 page table walks to downgrade to NS | Peter Maydell |
| 2023-05-12 | target/arm: Move helper-{a64,mve,sme,sve}.h to tcg/ | Richard Henderson |
| 2023-05-12 | target/arm: Move translate-a32.h, arm_ldst.h, sve_ldst_internal.h to tcg/ | Richard Henderson |
| 2023-05-11 | target/openrisc: Setup FPU for detecting tininess before rounding | Stafford Horne |
| 2023-05-11 | target/openrisc: Set PC to cpu state on FPU exception | Stafford Horne |
| 2023-05-11 | target/openrisc: Allow fpcsr access in user mode | Stafford Horne |
| 2023-05-11 | target/loongarch: Do not include tcg-ldst.h | Richard Henderson |
| 2023-05-11 | target/sh4: Use MO_ALIGN where required | Richard Henderson |
| 2023-05-11 | target/nios2: Remove TARGET_ALIGNED_ONLY | Richard Henderson |
| 2023-05-11 | target/mips: Use MO_ALIGN instead of 0 | Richard Henderson |
| 2023-05-11 | target/mips: Add missing default_tcg_memop_mask | Richard Henderson |
| 2023-05-11 | target/mips: Add MO_ALIGN to gen_llwp, gen_scwp | Richard Henderson |
| 2023-05-11 | target/m68k: Fix gen_load_fp for OS_LONG | Richard Henderson |
| 2023-05-10 | target/loongarch: Terminate vmstate subsections list | Richard Henderson |
| 2023-05-08 | target/i386: Add EPYC-Genoa model to support Zen 4 processor series | Babu Moger |
| 2023-05-08 | target/i386: Add VNMI and automatic IBRS feature bits | Babu Moger |
| 2023-05-08 | target/i386: Add missing feature bits in EPYC-Milan model | Babu Moger |
| 2023-05-08 | target/i386: Add feature bits for CPUID_Fn80000021_EAX | Babu Moger |
