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AgeCommit message (Expand)Author
2020-02-21target/arm: Set MVFR0.FPSP for ARMv5 cpusRichard Henderson
2020-02-21target/arm: Use isar_feature_aa32_simd_r32 more placesRichard Henderson
2020-02-21target/arm: Rename isar_feature_aa32_simd_r32Richard Henderson
2020-02-21target/arm: Convert PMULL.8 to gvecRichard Henderson
2020-02-21target/arm: Convert PMULL.64 to gvecRichard Henderson
2020-02-21target/arm: Convert PMUL.8 to gvecRichard Henderson
2020-02-21target/arm: Vectorize USHL and SSHLRichard Henderson
2020-02-21target/arm: Correctly implement ACTLR2, HACTLR2Peter Maydell
2020-02-21target/arm: Use FIELD_EX32 for testing 32-bit fieldsPeter Maydell
2020-02-21target/arm: Use isar_feature function for testing AA32HPD featurePeter Maydell
2020-02-21target/arm: Test correct register in aa32_pan and aa32_ats1e1 checksPeter Maydell
2020-02-21target/arm: Correct handling of PMCR_EL0.LC bitPeter Maydell
2020-02-21target/arm: Correct definition of PMCRDPPeter Maydell
2020-02-21target/arm: Provide ARMv8.4-PMU in '-cpu max'Peter Maydell
2020-02-21target/arm: Implement ARMv8.4-PMU extensionPeter Maydell
2020-02-21target/arm: Implement ARMv8.1-PMU extensionPeter Maydell
2020-02-21target/arm: Read debug-related ID registers from KVMPeter Maydell
2020-02-21target/arm: Move DBGDIDR into ARMISARegistersPeter Maydell
2020-02-21target/arm: Stop assuming DBGDIDR always existsPeter Maydell
2020-02-21target/arm: Add _aa64_ and _any_ versions of pmu_8_1 isar checksPeter Maydell
2020-02-21target/arm: Define an aa32_pmu_8_1 isar feature test functionPeter Maydell
2020-02-21target/arm: Use FIELD macros for clearing ID_DFR0 PERFMON fieldPeter Maydell
2020-02-21target/arm: Add and use FIELD definitions for ID_AA64DFR0_EL1Peter Maydell
2020-02-21target/arm: Factor out PMU register definitionsPeter Maydell
2020-02-21target/arm: Define and use any_predinv isar_feature testPeter Maydell
2020-02-21target/arm: Add isar_feature_any_fp16 and document naming/usage conventionsPeter Maydell
2020-02-21target/arm: Check aa32_pan in take_aarch32_exception(), not aa64_panPeter Maydell
2020-02-21target/arm: Add _aa32_ to isar_feature functions testing 32-bit ID registersPeter Maydell
2020-02-21target/arm: Split out aa64_va_parameter_tbi, aa64_va_parameter_tbidRichard Henderson
2020-02-21target/arm: Remove ttbr1_valid check from get_phys_addr_lpaeRichard Henderson
2020-02-21target/arm: Fix select for aa64_va_parameters_bothRichard Henderson
2020-02-21target/arm: Use bit 55 explicitly for pauthRichard Henderson
2020-02-21target/arm: Flush high bits of sve register after AdvSIMD INSRichard Henderson
2020-02-21target/arm: Flush high bits of sve register after AdvSIMD ZIP/UZP/TRNRichard Henderson
2020-02-21target/arm: Flush high bits of sve register after AdvSIMD TBL/TBXRichard Henderson
2020-02-21target/arm: Flush high bits of sve register after AdvSIMD EXTRichard Henderson
2020-02-21target/ppc/cpu.h: Clean up comments in the struct CPUPPCState definitionBALATON Zoltan
2020-02-21target/ppc/cpu.h: Move fpu related members closer in cpu envBALATON Zoltan
2020-02-21target/ppc: Fix typo in commentsBALATON Zoltan
2020-02-21target/ppc/cpu.h: Remove duplicate includesBALATON Zoltan
2020-02-18target/i386/whpx: Remove superfluous semicolonPhilippe Mathieu-Daudé
2020-02-14Merge remote-tracking branch 'remotes/palmer/tags/riscv-for-master-5.0-sf2' i...Peter Maydell
2020-02-14Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20200213'...Peter Maydell
2020-02-13target/arm: Implement ARMv8.1-VMID16 extensionPeter Maydell
2020-02-13target/arm: Enable ARMv8.2-UAO in -cpu maxRichard Henderson
2020-02-13target/arm: Implement UAO semanticsRichard Henderson
2020-02-13target/arm: Update MSR access to UAORichard Henderson
2020-02-13target/arm: Add ID_AA64MMFR2_EL1Richard Henderson
2020-02-13target/arm: Enable ARMv8.2-ATS1E1 in -cpu maxRichard Henderson
2020-02-13target/arm: Implement ATS1E1 system registersRichard Henderson