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AgeCommit message (Expand)Author
2017-10-27Merge remote-tracking branch 'remotes/rth/tags/pull-dis-20171026' into stagingPeter Maydell
2017-10-26tcg: Avoid setting tcg_initialize if !CONFIG_TCGRichard Henderson
2017-10-25ppc: Support Capstone in disas_set_infoRichard Henderson
2017-10-25arm: Support Capstone in disas_set_infoRichard Henderson
2017-10-25i386: Support Capstone in disas_set_infoRichard Henderson
2017-10-25disas: Remove unused flags argumentsRichard Henderson
2017-10-25target/arm: Don't set INSN_ARM_BE32 for CONFIG_USER_ONLYRichard Henderson
2017-10-25target/arm: Move BE32 disassembler fixupRichard Henderson
2017-10-25target/ppc: Convert to disas_set_info hookRichard Henderson
2017-10-25target/i386: Convert to disas_set_info hookRichard Henderson
2017-10-24tcg: Initialize cpu_env genericallyRichard Henderson
2017-10-24tcg: define tcg_init_ctx and make tcg_ctx a pointerEmilio G. Cota
2017-10-24target/sparc: check CF_PARALLEL instead of parallel_cpusEmilio G. Cota
2017-10-24target/sh4: check CF_PARALLEL instead of parallel_cpusEmilio G. Cota
2017-10-24target/s390x: check CF_PARALLEL instead of parallel_cpusEmilio G. Cota
2017-10-24target/m68k: check CF_PARALLEL instead of parallel_cpusEmilio G. Cota
2017-10-24target/i386: check CF_PARALLEL instead of parallel_cpusEmilio G. Cota
2017-10-24target/hppa: check CF_PARALLEL instead of parallel_cpusEmilio G. Cota
2017-10-24target/arm: check CF_PARALLEL instead of parallel_cpusEmilio G. Cota
2017-10-24tcg: convert tb->cflags reads to tb_cflags(tb)Emilio G. Cota
2017-10-24qom: Introduce CPUClass.tcg_initializeRichard Henderson
2017-10-24tcg: Remove TCGV_EQUAL*Richard Henderson
2017-10-24tcg: Remove GET_TCGV_* and MAKE_TCGV_*Richard Henderson
2017-10-21openrisc/cputimer: Perparation for MulticoreStafford Horne
2017-10-21target/openrisc: Make coreid and numcores variableStafford Horne
2017-10-20s390x/tcg: low-address protection supportDavid Hildenbrand
2017-10-20s390x: refactor error handling for MSCH handlerHalil Pasic
2017-10-20s390x: refactor error handling for HSCH handlerHalil Pasic
2017-10-20s390x: refactor error handling for CSCH handlerHalil Pasic
2017-10-20s390x: refactor error handling for XSCH handlerHalil Pasic
2017-10-20s390x: improve error handling for SSCH and RSCHHalil Pasic
2017-10-20s390x: move s390x_new_cpu() into board codeIgor Mammedov
2017-10-20s390x: fix cpu object referrence leak in s390x_new_cpu()Igor Mammedov
2017-10-20target/s390x: special handling when starting a CPU with WAIT PSWDavid Hildenbrand
2017-10-20s390x/tcg: refactor stfl(e) to use s390_get_feat_block()David Hildenbrand
2017-10-20s390x/tcg: unlock NMIDavid Hildenbrand
2017-10-20s390x/cpumodel: allow to enable SENSE RUNNING STATUS for qemuDavid Hildenbrand
2017-10-20s390x/tcg: switch to new SIGP handling codeDavid Hildenbrand
2017-10-20s390x/tcg: flush the tlb on SIGP SET PREFIXDavid Hildenbrand
2017-10-20s390x/tcg: implement STOP and RESET interrupts for TCGDavid Hildenbrand
2017-10-20s390x/tcg: implement SIGP CONDITIONAL EMERGENCY SIGNALDavid Hildenbrand
2017-10-20s390x/tcg: implement SIGP EMERGENCY SIGNALDavid Hildenbrand
2017-10-20s390x/tcg: implement SIGP EXTERNAL CALLDavid Hildenbrand
2017-10-20s390x/tcg: implement SIGP SENSEDavid Hildenbrand
2017-10-20s390x/tcg: implement SIGP SENSE RUNNING STATUSDavid Hildenbrand
2017-10-20s390x/kvm: factor out actual handling of STOP interruptsDavid Hildenbrand
2017-10-20s390x/kvm: factor out SIGP code into sigp.cDavid Hildenbrand
2017-10-20s390x/kvm: drop two debug printsDavid Hildenbrand
2017-10-20s390x/kvm: factor out storing of adtl CPU statusDavid Hildenbrand
2017-10-20s390x/kvm: factor out storing of CPU statusDavid Hildenbrand