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AgeCommit message (Expand)Author
2017-10-20s390x/tcg: switch to new SIGP handling codeDavid Hildenbrand
2017-10-20s390x/tcg: flush the tlb on SIGP SET PREFIXDavid Hildenbrand
2017-10-20s390x/tcg: implement STOP and RESET interrupts for TCGDavid Hildenbrand
2017-10-20s390x/tcg: implement SIGP CONDITIONAL EMERGENCY SIGNALDavid Hildenbrand
2017-10-20s390x/tcg: implement SIGP EMERGENCY SIGNALDavid Hildenbrand
2017-10-20s390x/tcg: implement SIGP EXTERNAL CALLDavid Hildenbrand
2017-10-20s390x/tcg: implement SIGP SENSEDavid Hildenbrand
2017-10-20s390x/tcg: implement SIGP SENSE RUNNING STATUSDavid Hildenbrand
2017-10-20s390x/kvm: factor out actual handling of STOP interruptsDavid Hildenbrand
2017-10-20s390x/kvm: factor out SIGP code into sigp.cDavid Hildenbrand
2017-10-20s390x/kvm: drop two debug printsDavid Hildenbrand
2017-10-20s390x/kvm: factor out storing of adtl CPU statusDavid Hildenbrand
2017-10-20s390x/kvm: factor out storing of CPU statusDavid Hildenbrand
2017-10-20s390x/kvm: generalize SIGP stop and restart interrupt injectionDavid Hildenbrand
2017-10-20s390x/kvm: pass ipb directly into handle_sigp()David Hildenbrand
2017-10-20target/s390x: interpret PSW_MASK_WAIT only for TCGDavid Hildenbrand
2017-10-20s390x/tcg: handle WAIT PSWs during interrupt injectionDavid Hildenbrand
2017-10-20target/s390x: factor out handling of WAIT PSW into s390_handle_wait()David Hildenbrand
2017-10-20s390x/tcg: a CPU cannot switch state due to an interruptDavid Hildenbrand
2017-10-20s390x/tcg: STOPPED cpus can never wake upDavid Hildenbrand
2017-10-20s390x/tcg: take care of external interrupt subclassesDavid Hildenbrand
2017-10-20s390x/tcg: rework checking for deliverable interruptsDavid Hildenbrand
2017-10-20s390x/tcg: injection of emergency signals and external callsDavid Hildenbrand
2017-10-20s390x/tcg: cleanup service interrupt injectionDavid Hildenbrand
2017-10-20s390x/tcg: turn INTERRUPT_EXT into a maskDavid Hildenbrand
2017-10-20S390: use g_new() family of functionsMarc-André Lureau
2017-10-19Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into stagingPeter Maydell
2017-10-19Merge remote-tracking branch 'remotes/riku/tags/pull-linux-user-20171018' int...Peter Maydell
2017-10-17ppc: spapr: use generic cpu_model parsingIgor Mammedov
2017-10-17ppc: move ppc_cpu_lookup_alias() before its first userIgor Mammedov
2017-10-17ppc: spapr: register 'host' core type along with the rest of core typesIgor Mammedov
2017-10-17ppc: spapr: use cpu type name directlyIgor Mammedov
2017-10-17ppc: move '-cpu foo,compat=xxx' parsing into ppc_cpu_parse_featurestr()Igor Mammedov
2017-10-17target/ppc: Fix carry flag setting for shift algebraic instructionsSandipan Das
2017-10-17target/ppc: Add POWER9 DD2.0 model informationDavid Gibson
2017-10-17target/ppc: Remove unused PPC 460 and 460F definitionsThomas Huth
2017-10-16target/i386: trap on instructions longer than >15 bytesPaolo Bonzini
2017-10-16target/i386: introduce x86_ld*_codePaolo Bonzini
2017-10-16nios2: define tcg_envPaolo Bonzini
2017-10-16build: remove CONFIG_LIBDECNUMBERPaolo Bonzini
2017-10-16linux-user/sh4: Reduce TARGET_VIRT_ADDR_SPACE_BITS to 31Richard Henderson
2017-10-16linux-user: Tidy and enforce reserved_va initializationRichard Henderson
2017-10-12target/arm: Implement SG instruction corner casesPeter Maydell
2017-10-12target/arm: Support some Thumb insns being always unconditionalPeter Maydell
2017-10-12target-arm: Simplify insn_crosses_page()Peter Maydell
2017-10-12target/arm: Pull Thumb insn word loads up to top levelPeter Maydell
2017-10-12target-arm: Don't check for "Thumb2 or M profile" for not-Thumb1Peter Maydell
2017-10-12target/arm: Implement secure function returnPeter Maydell
2017-10-12target/arm: Implement BLXNSPeter Maydell
2017-10-12target/arm: Implement SG instructionPeter Maydell
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