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AgeCommit message (Expand)Author
2023-02-07target/riscv: fix SBI getchar handler for KVMVladimir Isaev
2023-02-07target/riscv: fix ctzw behaviorVladimir Isaev
2023-02-07target/riscv: fix for virtual instr exceptionDeepak Gupta
2023-02-07RISC-V: Adding XTheadFmv ISA extensionChristoph Müllner
2023-02-07RISC-V: Add initial support for T-Head C906Christoph Müllner
2023-02-07RISC-V: Set minimum priv version for Zfh to 1.11Christoph Müllner
2023-02-07RISC-V: Adding T-Head FMemIdx extensionChristoph Müllner
2023-02-07RISC-V: Adding T-Head MemIdx extensionChristoph Müllner
2023-02-07RISC-V: Adding T-Head MemPair extensionChristoph Müllner
2023-02-07RISC-V: Adding T-Head multiply-accumulate instructionsChristoph Müllner
2023-02-07RISC-V: Adding XTheadCondMov ISA extensionChristoph Müllner
2023-02-07RISC-V: Adding XTheadBs ISA extensionChristoph Müllner
2023-02-07RISC-V: Adding XTheadBb ISA extensionChristoph Müllner
2023-02-07RISC-V: Adding XTheadBa ISA extensionChristoph Müllner
2023-02-07RISC-V: Adding XTheadSync ISA extensionChristoph Müllner
2023-02-07RISC-V: Adding XTheadCmo ISA extensionChristoph Müllner
2023-02-07target/riscv: set tval for triggered watchpointsSergey Matyukevich
2023-02-07target/riscv: Ensure opcode is saved for all relevant instructionsAnup Patel
2023-02-07target/riscv: No need to re-start QEMU timer when timecmp == UINT64_MAXAnup Patel
2023-02-07target/riscv: Don't clear mask in riscv_cpu_update_mip() for VSTIPAnup Patel
2023-02-07target/riscv: Update VS timer whenever htimedelta changesAnup Patel
2023-02-04Merge tag 'pull-tcg-20230204' of https://gitlab.com/rth7680/qemu into stagingPeter Maydell
2023-02-04target/i386: Inline cmpxchg16bRichard Henderson
2023-02-04target/i386: Inline cmpxchg8bRichard Henderson
2023-02-04target/i386: Split out gen_cmpxchg8b, gen_cmpxchg16bRichard Henderson
2023-02-04target/s390x: Implement CC_OP_NZ in gen_op_calc_ccRichard Henderson
2023-02-04target/s390x: Use tcg_gen_atomic_cmpxchg_i128 for CDSGRichard Henderson
2023-02-04target/s390x: Use Int128 for passing float128Richard Henderson
2023-02-04target/s390x: Use Int128 for returning float128Richard Henderson
2023-02-04target/s390x: Copy wout_x1 to wout_x1_PRichard Henderson
2023-02-04target/s390x: Use Int128 for return from TRERichard Henderson
2023-02-04target/s390x: Use Int128 for return from CKSMRichard Henderson
2023-02-04target/s390x: Use Int128 for return from CLSTRichard Henderson
2023-02-04target/s390x: Use a single return for helper_divs64/u64Richard Henderson
2023-02-04target/s390x: Use a single return for helper_divs32/u32Richard Henderson
2023-02-04target/ppc: Use tcg_gen_atomic_cmpxchg_i128 for STQCXRichard Henderson
2023-02-04target/arm: Use tcg_gen_atomic_cmpxchg_i128 for CASPRichard Henderson
2023-02-04target/arm: Use tcg_gen_atomic_cmpxchg_i128 for STXPRichard Henderson
2023-02-04Merge tag 'm68k-next-pull-request' of https://github.com/vivier/qemu-m68k int...Peter Maydell
2023-02-03target/arm: Enable FEAT_FGT on '-cpu max'Peter Maydell
2023-02-03target/arm: Implement MDCR_EL2.TDCC and MDCR_EL3.TDCC trapsPeter Maydell
2023-02-03target/arm: Implement the HFGITR_EL2.SVC_EL0 and SVC_EL1 trapsPeter Maydell
2023-02-03target/arm: Implement the HFGITR_EL2.ERET trapPeter Maydell
2023-02-03target/arm: Mark up sysregs for HFGITR bits 48..63Peter Maydell
2023-02-03target/arm: Mark up sysregs for HFGITR bits 18..47Peter Maydell
2023-02-03target/arm: Mark up sysregs for HFGITR bits 12..17Peter Maydell
2023-02-03target/arm: Mark up sysregs for HFGITR bits 0..11Peter Maydell
2023-02-03target/arm: Mark up sysregs for HDFGRTR bits 12..63Peter Maydell
2023-02-03target/arm: Mark up sysregs for HDFGRTR bits 0..11Peter Maydell
2023-02-03target/arm: Mark up sysregs for HFGRTR bits 36..63Peter Maydell