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2022-07-05Merge tag 'pull-request-2022-07-05' of https://gitlab.com/thuth/qemu into sta...Richard Henderson
2022-07-05target/loongarch: Clean up tlb when cpu resetSong Gao
2022-07-05disas: Remove libvixl disassemblerThomas Huth
2022-07-04target/loongarch: Add lock when writing timer clear regXiaojuan Yang
2022-07-04target/loongarch: Fix the meaning of ECFG reg's VS fieldXiaojuan Yang
2022-07-04target/loongarch: Update READMESong Gao
2022-07-04target/loongarch: Adjust functions and structure to support user-modeSong Gao
2022-07-04target/loongarch: remove unused include hw/loader.hSong Gao
2022-07-04target/loongarch: Fix helper_asrtle_d/asrtgt_d raise wrong exceptionSong Gao
2022-07-04target/loongarch: Fix missing update CSR_BADVSong Gao
2022-07-04target/loongarch: remove badaddr from CPULoongArchSong Gao
2022-07-03target/riscv: Update default priority table for local interruptsAnup Patel
2022-07-03target/riscv: Remove CSRs that set/clear an IMSIC interrupt file bitsAnup Patel
2022-07-03target/riscv: Set minumum priv spec version for mcountinhibitAnup Patel
2022-07-03target/riscv: Don't force update priv spec version to latestAnup Patel
2022-07-03target/riscv: Ibex: Support priv version 1.11Alistair Francis
2022-07-03target/riscv: Fixup MSECCFG minimum priv checkAlistair Francis
2022-07-03target/riscv: Support mcycle/minstret write operationAtish Patra
2022-07-03target/riscv: Add support for hpmcounters/hpmeventsAtish Patra
2022-07-03target/riscv: Implement mcountinhibit CSRAtish Patra
2022-07-03target/riscv: pmu: Make number of counters configurableAtish Patra
2022-07-03target/riscv: pmu: Rename the counters extension to pmuAtish Patra
2022-07-03target/riscv: Implement PMU CSR predicate function for S-modeAtish Patra
2022-07-03target/riscv: Fix PMU CSR predicate functionAtish Patra
2022-07-03target/riscv/pmp: guard against PMP ranges with a negative sizeNicolas Pitre
2022-07-03target/riscv: Minimize the calls to decode_save_opcRichard Henderson
2022-07-03target/riscv: Remove generate_exception_mtvalRichard Henderson
2022-07-03target/riscv: Set env->bins in gen_exception_illegalRichard Henderson
2022-07-03target/riscv: Remove condition guarding register zero for auipc and luiVĂ­ctor Colombo
2022-06-28target/nios2: Move nios2-semi.c to nios2_softmmu_ssRichard Henderson
2022-06-28target/nios2: Eliminate nios2_semi_is_lseekRichard Henderson
2022-06-28target/mips: Drop pread and pwrite syscalls from semihostingRichard Henderson
2022-06-28target/mips: Add UHI errno valuesRichard Henderson
2022-06-28target/mips: Use an exception for semihostingRichard Henderson
2022-06-28target/m68k: Make semihosting system onlyRichard Henderson
2022-06-28target/m68k: Eliminate m68k_semi_is_fseekRichard Henderson
2022-06-28gdbstub: Adjust gdb_syscall_complete_cb declarationRichard Henderson
2022-06-28semihosting: Split out common-semi-target.hRichard Henderson
2022-06-28include/exec: Move gdb_stat and gdb_timeval to gdbstub.hRichard Henderson
2022-06-28include/exec: Move gdb open flags to gdbstub.hRichard Henderson
2022-06-28semihosting: Return void from do_common_semihostingRichard Henderson
2022-06-28semihosting: Move exec/softmmu-semi.h to semihosting/softmmu-uaccess.hRichard Henderson
2022-06-27target/arm: Check V7VE as well as LPAE in arm_pamaxRichard Henderson
2022-06-27target/arm: Extend arm_pamax to more than aarch64Richard Henderson
2022-06-27target/arm: Move pred_{full, gvec}_reg_{offset, size} to translate-a64.hRichard Henderson
2022-06-27target/arm: Add SVL to TB flagsRichard Henderson
2022-06-27target/arm: Introduce sve_vqm1_for_el_smRichard Henderson
2022-06-27target/arm: Add cpu properties for SMERichard Henderson
2022-06-27target/arm: Unexport aarch64_add_*_propertiesRichard Henderson
2022-06-27target/arm: Move arm_cpu_*_finalize to internals.hRichard Henderson