slackcoder/qemu - QEMU is a generic and open source machine & userspace emulator and virtualizer

Age	Commit message (Expand)	Author
2019-05-26	target/mips: Fix MSA instructions LD.<B\|H\|W\|D> on big endian host	Mateja Marjanovic
2019-05-26	target/mips: Make the results of MOD_<U\|S>.<B\|H\|W\|D> the same as on hardware	Mateja Marjanovic
2019-05-26	target/mips: Make the results of DIV_<U\|S>.<B\|H\|W\|D> the same as on hardware	Mateja Marjanovic
2019-05-24	target/riscv: Only flush TLB if SATP.ASID changes	Jonathan Behrens
2019-05-24	target/riscv: More accurate handling of `sip` CSR	Jonathan Behrens
2019-05-24	target/riscv: Add checks for several RVC reserved operands	Richard Henderson
2019-05-24	target/riscv: Add the HGATP register masks	Alistair Francis
2019-05-24	target/riscv: Add the HSTATUS register masks	Alistair Francis
2019-05-24	target/riscv: Add Hypervisor CSR macros	Alistair Francis
2019-05-24	target/riscv: Allow setting mstatus virtulisation bits	Alistair Francis
2019-05-24	target/riscv: Add the MPV and MTL mstatus bits	Alistair Francis
2019-05-24	target/riscv: Improve the scause logic	Alistair Francis
2019-05-24	target/riscv: Trigger interrupt on MIP update asynchronously	Alistair Francis
2019-05-24	target/riscv: Mark privilege level 2 as reserved	Alistair Francis
2019-05-24	target/riscv: Add a base 32 and 64 bit CPU	Alistair Francis
2019-05-24	target/riscv: Create settable CPU properties	Alistair Francis
2019-05-24	target/riscv: Remove spaces from register names	Richard Henderson
2019-05-24	target/riscv: Split gen_arith_imm into functional and temp	Richard Henderson
2019-05-24	target/riscv: Split RVC32 and RVC64 insns into separate files	Richard Henderson
2019-05-24	target/riscv: Use pattern groups in insn16.decode	Richard Henderson
2019-05-24	target/riscv: Merge argument decode for RVC shifti	Richard Henderson
2019-05-24	target/riscv: Merge argument sets for insn32 and insn16	Richard Henderson
2019-05-24	target/riscv: Use --static-decode for decodetree	Richard Henderson
2019-05-24	target/riscv: Name the argument sets for all of insn32 formats	Richard Henderson
2019-05-24	RISC-V: fix single stepping over ret and other branching instructions	Fabien Chouteau
2019-05-24	target/riscv: Do not allow sfence.vma from user mode	Jonathan Behrens
2019-05-23	arm: Remove unnecessary includes of hw/arm/arm.h	Peter Maydell
2019-05-23	target/arm: Fix vector operation segfault	Alistair Francis
2019-05-23	target/arm: Simplify BFXIL expansion	Richard Henderson
2019-05-23	target/arm: Use extract2 for EXTR	Richard Henderson
2019-05-23	Merge remote-tracking branch 'remotes/rth/tags/pull-rng-20190522' into staging	Peter Maydell
2019-05-22	target/i386: Implement CPUID_EXT_RDRAND	Richard Henderson
2019-05-22	target/ppc: Use qemu_guest_getrandom for DARN	Richard Henderson
2019-05-22	target/ppc: Use gen_io_start/end around DARN	Richard Henderson
2019-05-22	target/arm: Implement ARMv8.5-RNG	Richard Henderson
2019-05-22	target/arm: Put all PAC keys into a structure	Richard Henderson
2019-05-21	target/i386: add MDS-NO feature	Paolo Bonzini
2019-05-21	target/i386: define md-clear bit	Paolo Bonzini
2019-05-21	Merge remote-tracking branch 'remotes/cohuck/tags/s390x-20190521-3' into staging	Peter Maydell
2019-05-21	s390x/cpumodel: wire up 8561 and 8562 as gen15 machines	Christian Borntraeger
2019-05-21	s390x/cpumodel: add gen15 defintions	Christian Borntraeger
2019-05-21	s390x/cpumodel: add Deflate-conversion facility	Christian Borntraeger
2019-05-21	s390x/cpumodel: enhanced sort facility	Christian Borntraeger
2019-05-21	s390x/cpumodel: vector enhancements	Christian Borntraeger
2019-05-21	s390x/cpumodel: msa9 facility	Christian Borntraeger
2019-05-21	s390x/cpumodel: Miscellaneous-Instruction-Extensions Facility 3	Christian Borntraeger
2019-05-21	s390x/cpumodel: ignore csske for expansion	Christian Borntraeger
2019-05-21	Merge remote-tracking branch 'remotes/xtensa/tags/20190520-xtensa' into staging	Peter Maydell
2019-05-19	target/alpha: Fix user-only floating-point exceptions	Richard Henderson
2019-05-19	target/alpha: Clean up alpha_cpu_dump_state	Richard Henderson