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2020-09-01target/arm: Use macros instead of open-coding fp16 conversion helpersPeter Maydell
2020-09-01target/arm: Make VFP_CONV_FIX macros take separate float type and float sizePeter Maydell
2020-09-01target/arm: Implement VFP fp16 VCVT between float and integerPeter Maydell
2020-09-01target/arm: Implement VFP fp16 VLDR and VSTRPeter Maydell
2020-09-01target/arm: Implement VFP fp16 VCMPPeter Maydell
2020-09-01target/arm: Implement VFP fp16 for VMOV immediatePeter Maydell
2020-09-01target/arm: Implement VFP fp16 for VABS, VNEG, VSQRTPeter Maydell
2020-09-01target/arm: Macroify uses of do_vfp_2op_sp() and do_vfp_2op_dp()Peter Maydell
2020-09-01target/arm: Implement VFP fp16 for fused-multiply-addPeter Maydell
2020-09-01target/arm: Macroify trans functions for VFMA, VFMS, VFNMA, VFNMSPeter Maydell
2020-09-01target/arm: Implement VFP fp16 VMLA, VMLS, VNMLS, VNMLA, VNMULPeter Maydell
2020-09-01target/arm: Implement VFP fp16 for VFP_BINOP operationsPeter Maydell
2020-09-01target/arm: Use correct ID register check for aa32_fp16_arithPeter Maydell
2020-09-01target/arm: Remove local definitions of float constantsPeter Maydell
2020-08-28softfloat: Implement the full set of comparisons for float16Kito Cheng
2020-08-28Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20200828'...Peter Maydell
2020-08-28target/arm: Convert sq{, r}dmulh to gvec for aa64 advsimdRichard Henderson
2020-08-28target/arm: Convert integer multiply-add (indexed) to gvec for aa64 advsimdRichard Henderson
2020-08-28target/arm: Convert integer multiply (indexed) to gvec for aa64 advsimdRichard Henderson
2020-08-28target/arm: Generalize inl_qrdmlah_* helper functionsRichard Henderson
2020-08-28target/arm: Tidy SVE tszimm shift formatsRichard Henderson
2020-08-28target/arm: Split out gen_gvec_ool_zzRichard Henderson
2020-08-28target/arm: Split out gen_gvec_ool_zzzRichard Henderson
2020-08-28target/arm: Split out gen_gvec_ool_zzpRichard Henderson
2020-08-28target/arm: Merge helper_sve_clr_* and helper_sve_movz_*Richard Henderson
2020-08-28target/arm: Split out gen_gvec_ool_zzzpRichard Henderson
2020-08-28target/arm: Use tcg_gen_gvec_bitsel for trans_SEL_ppppRichard Henderson
2020-08-28target/arm: Clean up 4-operand predicate expansionRichard Henderson
2020-08-28target/arm: Merge do_vector2_p into do_mov_pRichard Henderson
2020-08-28target/arm: Rearrange {sve,fp}_check_access assertRichard Henderson
2020-08-28target/arm: Split out gen_gvec_fn_zzz, do_zzz_fnRichard Henderson
2020-08-28target/arm: Split out gen_gvec_fn_zzRichard Henderson
2020-08-28target/arm: Fill in the WnR syndrome bit in mte_check_failRichard Henderson
2020-08-28target/arm: Pass the entire mte descriptor to mte_check_failRichard Henderson
2020-08-28target/arm: Clarify HCR_EL2 ARMCPRegInfo typePhilippe Mathieu-Daudé
2020-08-27hvf: Move HVFState typedef to hvf.hEduardo Habkost
2020-08-25target/riscv: Support the Virtual Instruction faultAlistair Francis
2020-08-25target/riscv: Return the exception from invalid CSR accessesAlistair Francis
2020-08-25target/riscv: Support the v0.6 Hypervisor extension CRSsAlistair Francis
2020-08-25target/riscv: Only support little endian guestsAlistair Francis
2020-08-25target/riscv: Only support a single VSXL lengthAlistair Francis
2020-08-25target/riscv: Update the CSRs to the v0.6 Hyp extensionAlistair Francis
2020-08-25target/riscv: Update the Hypervisor trap return/entryAlistair Francis
2020-08-25target/riscv: Fix the interrupt cause codeAlistair Francis
2020-08-25target/riscv: Convert MSTATUS MTL to GVAAlistair Francis
2020-08-25target/riscv: Don't allow guest to write to htinstAlistair Francis
2020-08-25target/riscv: Do two-stage lookups on hlv/hlvx/hsv instructionsAlistair Francis
2020-08-25target/riscv: Allow generating hlv/hlvx/hsv instructionsAlistair Francis
2020-08-25target/riscv: Allow setting a two-stage lookup in the virt statusAlistair Francis
2020-08-24Merge remote-tracking branch 'remotes/xtensa/tags/20200821-xtensa' into stagingPeter Maydell