Age | Commit message (Expand) | Author |
2020-08-25 | target/riscv: Support the Virtual Instruction fault | Alistair Francis |
2020-08-25 | target/riscv: Return the exception from invalid CSR accesses | Alistair Francis |
2020-08-25 | target/riscv: Support the v0.6 Hypervisor extension CRSs | Alistair Francis |
2020-08-25 | target/riscv: Only support little endian guests | Alistair Francis |
2020-08-25 | target/riscv: Only support a single VSXL length | Alistair Francis |
2020-08-25 | target/riscv: Update the CSRs to the v0.6 Hyp extension | Alistair Francis |
2020-08-25 | target/riscv: Update the Hypervisor trap return/entry | Alistair Francis |
2020-08-25 | target/riscv: Fix the interrupt cause code | Alistair Francis |
2020-08-25 | target/riscv: Convert MSTATUS MTL to GVA | Alistair Francis |
2020-08-25 | target/riscv: Don't allow guest to write to htinst | Alistair Francis |
2020-08-25 | target/riscv: Do two-stage lookups on hlv/hlvx/hsv instructions | Alistair Francis |
2020-08-25 | target/riscv: Allow generating hlv/hlvx/hsv instructions | Alistair Francis |
2020-08-25 | target/riscv: Allow setting a two-stage lookup in the virt status | Alistair Francis |
2020-08-24 | Merge remote-tracking branch 'remotes/xtensa/tags/20200821-xtensa' into staging | Peter Maydell |
2020-08-24 | Merge remote-tracking branch 'remotes/edgar/tags/edgar/xilinx-next-2020-08-24... | Peter Maydell |
2020-08-24 | Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20200824'... | Peter Maydell |
2020-08-24 | target/arm: Use correct FPST for VCMLA, VCADD on fp16 | Peter Maydell |
2020-08-24 | target/arm: Implement FPST_STD_F16 fpstatus | Peter Maydell |
2020-08-24 | target/arm: Make A32/T32 use new fpstatus_ptr() API | Peter Maydell |
2020-08-24 | target/arm: Replace A64 get_fpstatus_ptr() with generic fpstatus_ptr() | Peter Maydell |
2020-08-24 | target/arm: Delete unused ARM_FEATURE_CRC | Peter Maydell |
2020-08-24 | target/arm/translate.c: Delete/amend incorrect comments | Peter Maydell |
2020-08-24 | target/arm: Delete unused VFP_DREG macros | Peter Maydell |
2020-08-24 | target/arm: Remove ARCH macro | Peter Maydell |
2020-08-24 | target/arm: Convert T32 coprocessor insns to decodetree | Peter Maydell |
2020-08-24 | target/arm: Do M-profile NOCP checks early and via decodetree | Peter Maydell |
2020-08-24 | target/arm: Tidy up disas_arm_insn() | Peter Maydell |
2020-08-24 | target/arm: Convert A32 coprocessor insns to decodetree | Peter Maydell |
2020-08-24 | target/arm: Separate decode from handling of coproc insns | Peter Maydell |
2020-08-24 | target/arm: Pull handling of XScale insns out of disas_coproc_insn() | Peter Maydell |
2020-08-24 | target/microblaze: mbar: Trap sleeps from user-space | Edgar E. Iglesias |
2020-08-24 | target/microblaze: swx: Use atomic_cmpxchg | Edgar E. Iglesias |
2020-08-24 | target/microblaze: mbar: Add support for data-access barriers | Edgar E. Iglesias |
2020-08-24 | target/microblaze: mbar: Move LOG_DIS to before sleep | Edgar E. Iglesias |
2020-08-24 | target/microblaze: mbar: Transfer dc->rd to mbar_imm | Edgar E. Iglesias |
2020-08-24 | Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-5.2-20200818' into... | Peter Maydell |
2020-08-23 | Merge remote-tracking branch 'remotes/alistair/tags/pull-riscv-to-apply-20200... | Peter Maydell |
2020-08-21 | target/riscv: Change the TLB page size depends on PMP entries. | Zong Li |
2020-08-21 | target/riscv: Fix the translation of physical address | Zong Li |
2020-08-21 | riscv: Fix bug in setting pmpcfg CSR for RISCV64 | Hou Weiying |
2020-08-21 | target/riscv: check before allocating TCG temps | LIU Zhiwei |
2020-08-21 | target/riscv: Clean up fmv.w.x | LIU Zhiwei |
2020-08-21 | target/riscv: Check nanboxed inputs in trans_rvf.inc.c | Richard Henderson |
2020-08-21 | target/riscv: Check nanboxed inputs to fp helpers | Richard Henderson |
2020-08-21 | target/riscv: Generate nanboxed results from trans_rvf.inc.c | Richard Henderson |
2020-08-21 | target/riscv: Generalize gen_nanbox_fpr to gen_nanbox_s | Richard Henderson |
2020-08-21 | target/riscv: Generate nanboxed results from fp helpers | Richard Henderson |
2020-08-21 | target/xtensa: import DSP3400 core | Max Filippov |
2020-08-21 | target/xtensa: import de233_fpu core | Max Filippov |
2020-08-21 | target/xtensa: implement FPU division and square root | Max Filippov |