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AgeCommit message (Expand)Author
2021-09-01target/riscv: Remove gen_arith_div*Richard Henderson
2021-09-01target/riscv: Add DisasExtend to gen_arith*Richard Henderson
2021-09-01target/riscv: Introduce DisasExtend and new helpersRichard Henderson
2021-09-01target/riscv: Add DisasContext to gen_get_gpr, gen_set_gprRichard Henderson
2021-09-01target/riscv: Clean up division helpersRichard Henderson
2021-09-01target/riscv: Use tcg_constant_*Richard Henderson
2021-09-01target/riscv: Add User CSRs read-only checkLIU Zhiwei
2021-09-01target/riscv: Don't wrongly override isa versionLIU Zhiwei
2021-09-01target/riscv: Correct a comment in riscv_csrrw()Bin Meng
2021-08-27Merge remote-tracking branch 'remotes/dg-gitlab/tags/ppc-for-6.2-20210827' in...Peter Maydell
2021-08-27Merge remote-tracking branch 'remotes/armbru/tags/pull-error-2021-08-26' into...Peter Maydell
2021-08-27target/ppc: fix vector registers access in gdbstub for little-endianMatheus Ferst
2021-08-27target/ppc: fix vextu[bhw][lr]x helpersMatheus Ferst
2021-08-27ppc/pnv: powerpc_excp: Do not discard HDECR exception when entering power-sav...Cédric Le Goater
2021-08-27ppc: Add a POWER10 DD2 CPUCédric Le Goater
2021-08-27target/ppc: moved store_40x_sler to helper_regs.cLucas Mateus Castro (alqotel)
2021-08-27target/ppc: moved ppc_store_sdr1 to mmu_common.cLucas Mateus Castro (alqotel)
2021-08-27target/ppc: divided mmu_helper.c in 2 filesLucas Mateus Castro (alqotel)
2021-08-26target/arm: Do hflags rebuild in cpsr_write()Peter Maydell
2021-08-26target/arm: Implement HSTR.TJDBXPeter Maydell
2021-08-26target/arm: Implement HSTR.TTEEPeter Maydell
2021-08-26target/arm: Avoid assertion trying to use KVM and multiple ASesPeter Maydell
2021-08-26arch_init.h: Don't include arch_init.h unnecessarilyPeter Maydell
2021-08-26target/arm/cpu64: Validate sve vector lengths are supportedAndrew Jones
2021-08-26target/arm/cpu64: Replace kvm_supported with sve_vq_supportedAndrew Jones
2021-08-26target/arm/kvm64: Ensure sve vls map is completely clearAndrew Jones
2021-08-26target/arm/cpu: Introduce sve_vq_supported bitmapAndrew Jones
2021-08-26migration: Unify failure check for migrate_add_blocker()Markus Armbruster
2021-08-26whpx nvmm: Drop useless migrate_del_blocker()Markus Armbruster
2021-08-26i386: Never free migration blocker objects instead of sometimesMarkus Armbruster
2021-08-26error: Use error_fatal to simplify obvious fatal errors (again)Markus Armbruster
2021-08-26Merge remote-tracking branch 'remotes/ehabkost-gl/tags/x86-next-pull-request'...Peter Maydell
2021-08-25Merge remote-tracking branch 'remotes/philmd/tags/mips-20210825' into stagingPeter Maydell
2021-08-25i386/cpu: Remove AVX_VNNI feature from Cooperlake cpu modelYang Zhong
2021-08-25target/i386: Remove split lock detect in Snowridge CPU modelChenyi Qiang
2021-08-25target/mips: Replace TARGET_WORDS_BIGENDIAN by cpu_is_bigendian()Philippe Mathieu-Daudé
2021-08-25target/mips: Store CP0_Config0 in DisasContextPhilippe Mathieu-Daudé
2021-08-25target/mips: Replace GET_LMASK64() macro by get_lmask(64) functionPhilippe Mathieu-Daudé
2021-08-25target/mips: Replace GET_LMASK() macro by get_lmask(32) functionPhilippe Mathieu-Daudé
2021-08-25target/mips: Call cpu_is_bigendian & inline GET_OFFSET in ld/st helpersPhilippe Mathieu-Daudé
2021-08-25target/mips: Define gen_helper() macros in translate.hPhilippe Mathieu-Daudé
2021-08-25target/mips: Use tcg_constant_i32() in generate_exception_err()Philippe Mathieu-Daudé
2021-08-25target/mips: Inline gen_helper_0e0i()Philippe Mathieu-Daudé
2021-08-25target/mips: Inline gen_helper_1e1i() call in op_ld_INSN() macrosPhilippe Mathieu-Daudé
2021-08-25target/mips: Simplify gen_helper() macros by using tcg_constant_i32()Philippe Mathieu-Daudé
2021-08-25target/mips: Use tcg_constant_i32() in gen_helper_0e2i()Philippe Mathieu-Daudé
2021-08-25target/mips: Remove gen_helper_1e2i()Philippe Mathieu-Daudé
2021-08-25target/mips: Remove gen_helper_0e3i()Philippe Mathieu-Daudé
2021-08-25target/mips: Remove duplicated check_cp1_enabled() calls in Loongson EXTPhilippe Mathieu-Daudé
2021-08-25target/mips: Allow Loongson 3A1000 to use up to 48-bit VAddrPhilippe Mathieu-Daudé