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QEMU is a generic and open source machine & userspace emulator and virtualizer
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2017-02-02
target/ppc/debug: Print LPCR register value if register exists
Suraj Jitindar Singh
2017-02-02
target-ppc: Add xststdc[sp, dp, qp] instructions
Nikunj A Dadhania
2017-02-02
target-ppc: Add xvtstdc[sp,dp] instructions
Nikunj A Dadhania
2017-02-01
arm: add trailing ; after MISMATCH_CHECK
Michael S. Tsirkin
2017-02-01
arm: better stub version for MISMATCH_CHECK
Michael S. Tsirkin
2017-01-31
target/ppc/cpu-models: Fix/remove bad CPU aliases
Thomas Huth
2017-01-31
target/ppc: Remove unused POWERPC_FAMILY(POWER)
Thomas Huth
2017-01-31
spapr: clock should count only if vm is running
Laurent Vivier
2017-01-31
target/ppc: Add pcr_supported to POWER9 cpu class definition
Suraj Jitindar Singh
2017-01-31
powerpc/cpu-models: rename ISAv3.00 logical PVR definition
Suraj Jitindar Singh
2017-01-31
target-ppc: Add xvcv[hpsp, sphp] instructions
Nikunj A Dadhania
2017-01-31
target-ppc: Add xsmulqp instruction
Bharata B Rao
2017-01-31
target-ppc: Add xsdivqp instruction
Bharata B Rao
2017-01-31
target-ppc: Add xscvsdqp and xscvudqp instructions
Bharata B Rao
2017-01-31
target-ppc: Use ppc_vsr_t.f128 in xscmp[o,u,exp]qp
Bharata B Rao
2017-01-31
ppc: Implement bcdutrunc. instruction
Jose Ricardo Ziviani
2017-01-31
ppc: Implement bcdtrunc. instruction
Jose Ricardo Ziviani
2017-01-31
target-ppc: Add xscvqps[d,w]z instructions
Bharata B Rao
2017-01-31
target-ppc: Add xvxsigdp instruction
Nikunj A Dadhania
2017-01-31
target-ppc: Add xvxsigsp instruction
Nikunj A Dadhania
2017-01-31
target-ppc: Add xvxexpdp instruction
Nikunj A Dadhania
2017-01-31
target-ppc: Add xvxexpsp instruction
Nikunj A Dadhania
2017-01-31
target-ppc: Add xviexpdp instruction
Nikunj A Dadhania
2017-01-31
target-ppc: Add xviexpsp instruction
Nikunj A Dadhania
2017-01-31
target-ppc: Add xsiexpqp instruction
Nikunj A Dadhania
2017-01-31
target-ppc: Add xsiexpdp instruction
Nikunj A Dadhania
2017-01-31
ppc: Implement bcdsr. instruction
Jose Ricardo Ziviani
2017-01-31
ppc: Implement bcdus. instruction
Jose Ricardo Ziviani
2017-01-31
ppc: Implement bcds. instruction
Jose Ricardo Ziviani
2017-01-31
target-ppc: xscvqpdp zero VSR
Nikunj A Dadhania
2017-01-31
ppc: Fix a warning in bcdcfz code and improve BCD_DIG_BYTE macro
Jose Ricardo Ziviani
2017-01-31
target-ppc: Add xscvqpdp instruction
Bharata B Rao
2017-01-31
target-ppc: Add xscvdpqp instruction
Bharata B Rao
2017-01-31
target-ppc: Add xsaddqp instructions
Bharata B Rao
2017-01-31
ppc: Add ppc_set_compat_all()
David Gibson
2017-01-31
target-ppc: Add xsxsigqp instructions
Nikunj A Dadhania
2017-01-31
target-ppc: Add xsxsigdp instruction
Nikunj A Dadhania
2017-01-31
target-ppc: Add xsxexpqp instruction
Nikunj A Dadhania
2017-01-31
target-ppc: Add xsxexpdp instruction
Nikunj A Dadhania
2017-01-31
target-ppc: Use correct precision for FPRF setting
Bharata B Rao
2017-01-31
target-ppc: Add xscvdphp, xscvhpdp
Bharata B Rao
2017-01-31
target-ppc: Rename helper_compute_fprf to helper_compute_fprf_float64
Bharata B Rao
2017-01-31
target-ppc: Replace isden by float64_is_zero_or_denormal
Bharata B Rao
2017-01-31
target-ppc: Use float64 arg in helper_compute_fprf()
Bharata B Rao
2017-01-31
target-ppc: Add xxinsertw instruction
Nikunj A Dadhania
2017-01-31
target-ppc: Add xxextractuw instruction
Nikunj A Dadhania
2017-01-31
ppc: Validate compatibility modes when setting
David Gibson
2017-01-31
ppc: Rewrite ppc_get_compat_smt_threads()
David Gibson
2017-01-31
ppc: Rewrite ppc_set_compat()
David Gibson
2017-01-31
target-ppc: implement stxvll instructions
Nikunj A Dadhania
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