index
:
slackcoder/qemu
master
QEMU is a generic and open source machine & userspace emulator and virtualizer
Mirror
about
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
target
Age
Commit message (
Expand
)
Author
2019-03-15
target/arm: Check access permission to ADDVL/ADDPL/RDVL
Amir Charif
2019-03-15
target/arm: change arch timer registers access permission
Dongjiu Geng
2019-03-13
Merge remote-tracking branch 'remotes/palmer/tags/riscv-for-master-4.0-sf4' i...
Peter Maydell
2019-03-13
target/riscv: Remove decode_RV32_64G()
Bastian Koppelmann
2019-03-13
target/riscv: Remove gen_system()
Bastian Koppelmann
2019-03-13
target/riscv: Rename trans_arith to gen_arith
Bastian Koppelmann
2019-03-13
target/riscv: Remove manual decoding of RV32/64M insn
Bastian Koppelmann
2019-03-13
target/riscv: Remove shift and slt insn manual decoding
Bastian Koppelmann
2019-03-13
target/riscv: make ADD/SUB/OR/XOR/AND insn use arg lists
Bastian Koppelmann
2019-03-13
target/riscv: Move gen_arith_imm() decoding into trans_* functions
Bastian Koppelmann
2019-03-13
target/riscv: Remove manual decoding from gen_store()
Bastian Koppelmann
2019-03-13
target/riscv: Remove manual decoding from gen_load()
Bastian Koppelmann
2019-03-13
target/riscv: Remove manual decoding from gen_branch()
Bastian Koppelmann
2019-03-13
target/riscv: Remove gen_jalr()
Bastian Koppelmann
2019-03-13
target/riscv: Convert quadrant 2 of RVXC insns to decodetree
Bastian Koppelmann
2019-03-13
target/riscv: Convert quadrant 1 of RVXC insns to decodetree
Bastian Koppelmann
2019-03-13
target/riscv: Convert quadrant 0 of RVXC insns to decodetree
Bastian Koppelmann
2019-03-13
target/riscv: Convert RV priv insns to decodetree
Bastian Koppelmann
2019-03-13
target/riscv: Convert RV64D insns to decodetree
Bastian Koppelmann
2019-03-13
target/riscv: Convert RV32D insns to decodetree
Bastian Koppelmann
2019-03-13
target/riscv: Convert RV64F insns to decodetree
Bastian Koppelmann
2019-03-13
target/riscv: Convert RV32F insns to decodetree
Bastian Koppelmann
2019-03-13
target/riscv: Convert RV64A insns to decodetree
Bastian Koppelmann
2019-03-13
target/riscv: Convert RV32A insns to decodetree
Bastian Koppelmann
2019-03-13
target/riscv: Convert RVXM insns to decodetree
Bastian Koppelmann
2019-03-13
target/riscv: Convert RVXI csr insns to decodetree
Bastian Koppelmann
2019-03-13
target/riscv: Convert RVXI fence insns to decodetree
Bastian Koppelmann
2019-03-13
target/riscv: Convert RVXI arithmetic insns to decodetree
Bastian Koppelmann
2019-03-13
target/riscv: Convert RV64I load/store insns to decodetree
Bastian Koppelmann
2019-03-13
target/riscv: Convert RV32I load/store insns to decodetree
Bastian Koppelmann
2019-03-13
target/riscv: Convert RVXI branch insns to decodetree
Bastian Koppelmann
2019-03-13
target/riscv: Activate decodetree and implemnt LUI & AUIPC
Bastian Koppelmann
2019-03-12
target/hppa: exit TB if either Data or Instruction TLB changes
Sven Schnelle
2019-03-12
target/hppa: add TLB protection id check
Sven Schnelle
2019-03-12
target/hppa: allow multiple itlbp without itlba
Sven Schnelle
2019-03-12
target/hppa: fix b,gate instruction
Sven Schnelle
2019-03-12
target/hppa: ignore DIAG opcode
Sven Schnelle
2019-03-12
target/hppa: remove PSW I/R/Q bit check
Sven Schnelle
2019-03-12
target/hppa: add TLB trace events
Sven Schnelle
2019-03-12
target/hppa: report ITLB_EXCP_MISS for ITLB misses
Sven Schnelle
2019-03-12
target/hppa: fix TLB handling for page 0
Sven Schnelle
2019-03-12
target/hppa: fix overwriting source reg in addb
Sven Schnelle
2019-03-12
target/hppa: Check for page crossings in use_goto_tb
Richard Henderson
2019-03-12
spapr: Use CamelCase properly
David Gibson
2019-03-12
target/ppc: Optimize x[sv]xsigdp using deposit_i64()
Philippe Mathieu-Daudé
2019-03-12
target/ppc: Optimize xviexpdp() using deposit_i64()
Philippe Mathieu-Daudé
2019-03-12
target/ppc: add HV support for POWER9
Cédric Le Goater
2019-03-12
target/ppc: introduce vsr64_offset() to simplify get_cpu_vsr{l,h}() and set_c...
Mark Cave-Ayland
2019-03-12
target/ppc: switch fpr/vsrl registers so all VSX registers are in host endian...
Mark Cave-Ayland
2019-03-12
target/ppc: improve avr64_offset() and use it to simplify get_avr64()/set_avr...
Mark Cave-Ayland
[next]