| Age | Commit message (Expand) | Author |
|---|
| 2020-09-01 | target/microblaze: Convert to DisasContextBase | Richard Henderson |
| 2020-09-01 | target/microblaze: Check singlestep_enabled in gen_goto_tb | Richard Henderson |
| 2020-09-01 | target/microblaze: Use DISAS_NORETURN | Richard Henderson |
| 2020-09-01 | target/microblaze: Split out MSR[C] to its own variable | Richard Henderson |
| 2020-09-01 | target/microblaze: Tidy mb_tcg_init | Richard Henderson |
| 2020-09-01 | target/microblaze: Rename env_* tcg variables to cpu_* | Richard Henderson |
| 2020-09-01 | target/microblaze: Remove helper_debug and env->debug | Richard Henderson |
| 2020-09-01 | target/microblaze: Mark raise_exception as noreturn | Richard Henderson |
| 2020-09-01 | target/microblaze: Tidy raising of exceptions | Richard Henderson |
| 2020-09-01 | target/microblaze: Remove cpu_ear | Richard Henderson |
| 2020-09-01 | target/microblaze: Fix width of EDR | Richard Henderson |
| 2020-09-01 | target/microblaze: Fix width of BTR | Richard Henderson |
| 2020-09-01 | target/microblaze: Fix width of FSR | Richard Henderson |
| 2020-09-01 | target/microblaze: Fix width of ESR | Richard Henderson |
| 2020-09-01 | target/microblaze: Fix width of MSR | Richard Henderson |
| 2020-09-01 | target/microblaze: Fix width of PC and BTARGET | Richard Henderson |
| 2020-09-01 | target/microblaze: Split the cpu_SR array | Richard Henderson |
| 2020-09-01 | target/microblaze: Split out EDR from env->sregs | Richard Henderson |
| 2020-09-01 | target/microblaze: Split out BTR from env->sregs | Richard Henderson |
| 2020-09-01 | target/microblaze: Split out FSR from env->sregs | Richard Henderson |
| 2020-09-01 | target/microblaze: Split out ESR from env->sregs | Richard Henderson |
| 2020-09-01 | target/microblaze: Split out EAR from env->sregs | Richard Henderson |
| 2020-09-01 | target/microblaze: Split out MSR from env->sregs | Richard Henderson |
| 2020-09-01 | target/microblaze: Split out PC from env->sregs | Richard Henderson |
| 2020-09-01 | target/microblaze: Tidy gdbstub | Richard Henderson |
| 2020-09-01 | Merge remote-tracking branch 'remotes/vivier2/tags/trivial-branch-for-5.2-pul... | Peter Maydell |
| 2020-09-01 | target/arm: Enable FP16 in '-cpu max' | Peter Maydell |
| 2020-09-01 | target/arm: Implement fp16 for Neon VMUL, VMLA, VMLS | Peter Maydell |
| 2020-09-01 | target/arm/vec_helper: Add gvec fp indexed multiply-and-add operations | Peter Maydell |
| 2020-09-01 | target/arm/vec_helper: Handle oprsz less than 16 bytes in indexed operations | Peter Maydell |
| 2020-09-01 | target/arm: Implement fp16 for Neon VRINTX | Peter Maydell |
| 2020-09-01 | target/arm: Implement fp16 for Neon VRINT-with-specified-rounding-mode | Peter Maydell |
| 2020-09-01 | target/arm: Implement fp16 for Neon VCVT with rounding modes | Peter Maydell |
| 2020-09-01 | target/arm: Implement fp16 for Neon VCVT fixed-point | Peter Maydell |
| 2020-09-01 | target/arm: Convert Neon VCVT fixed-point to gvec | Peter Maydell |
| 2020-09-01 | target/arm: Implement fp16 for Neon float-integer VCVT | Peter Maydell |
| 2020-09-01 | target/arm: Implement fp16 for Neon pairwise fp ops | Peter Maydell |
| 2020-09-01 | target/arm: Implement fp16 for Neon VRSQRTS | Peter Maydell |
| 2020-09-01 | target/arm: Implement fp16 for Neon VRECPS | Peter Maydell |
| 2020-09-01 | target/arm: Implement fp16 for Neon fp compare-vs-0 | Peter Maydell |
| 2020-09-01 | target/arm: Implement fp16 for Neon VFMA, VMFS | Peter Maydell |
| 2020-09-01 | target/arm: Implement fp16 for Neon VMLA, VMLS operations | Peter Maydell |
| 2020-09-01 | target/arm: Implement fp16 for Neon VMAXNM, VMINNM | Peter Maydell |
| 2020-09-01 | target/arm: Implement fp16 for Neon VMAX, VMIN | Peter Maydell |
| 2020-09-01 | target/arm: Implement fp16 for VACGE, VACGT | Peter Maydell |
| 2020-09-01 | target/arm: Implement fp16 for VCEQ, VCGE, VCGT comparisons | Peter Maydell |
| 2020-09-01 | target/arm: Implement fp16 for Neon VABS, VNEG of floats | Peter Maydell |
| 2020-09-01 | target/arm: Implement fp16 for Neon VRECPE, VRSQRTE using gvec | Peter Maydell |
| 2020-09-01 | target/arm: Implement FP16 for Neon VADD, VSUB, VABD, VMUL | Peter Maydell |
| 2020-09-01 | target/arm: Implement VFP fp16 VMOV between gp and halfprec registers | Peter Maydell |
