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AgeCommit message (Expand)Author
2023-05-16target/s390x: Fix EXECUTE of relative branchesIlya Leoshkevich
2023-05-16s390x/tcg: Fix LDER instruction formatIlya Leoshkevich
2023-05-16hw/core: Use a callback for target specific query-cpus-fast informationThomas Huth
2023-05-13Merge tag 'or1k-pull-request-20230513' of https://github.com/stffrdhrn/qemu i...Richard Henderson
2023-05-12target/arm: Correct AArch64.S2MinTxSZ 32-bit EL1 input size checkPeter Maydell
2023-05-12target/arm: Select CONFIG_ARM_V7M when TCG is enabledFabiano Rosas
2023-05-12target/arm: Select SEMIHOSTING when using TCGFabiano Rosas
2023-05-12target/arm: Fix handling of SW and NSW bits for stage 2 walksPeter Maydell
2023-05-12target/arm: Don't allow stage 2 page table walks to downgrade to NSPeter Maydell
2023-05-12target/arm: Move helper-{a64,mve,sme,sve}.h to tcg/Richard Henderson
2023-05-12target/arm: Move translate-a32.h, arm_ldst.h, sve_ldst_internal.h to tcg/Richard Henderson
2023-05-11target/openrisc: Setup FPU for detecting tininess before roundingStafford Horne
2023-05-11target/openrisc: Set PC to cpu state on FPU exceptionStafford Horne
2023-05-11target/openrisc: Allow fpcsr access in user modeStafford Horne
2023-05-11target/loongarch: Do not include tcg-ldst.hRichard Henderson
2023-05-11target/sh4: Use MO_ALIGN where requiredRichard Henderson
2023-05-11target/nios2: Remove TARGET_ALIGNED_ONLYRichard Henderson
2023-05-11target/mips: Use MO_ALIGN instead of 0Richard Henderson
2023-05-11target/mips: Add missing default_tcg_memop_maskRichard Henderson
2023-05-11target/mips: Add MO_ALIGN to gen_llwp, gen_scwpRichard Henderson
2023-05-11target/m68k: Fix gen_load_fp for OS_LONGRichard Henderson
2023-05-10target/loongarch: Terminate vmstate subsections listRichard Henderson
2023-05-08target/i386: Add EPYC-Genoa model to support Zen 4 processor seriesBabu Moger
2023-05-08target/i386: Add VNMI and automatic IBRS feature bitsBabu Moger
2023-05-08target/i386: Add missing feature bits in EPYC-Milan modelBabu Moger
2023-05-08target/i386: Add feature bits for CPUID_Fn80000021_EAXBabu Moger
2023-05-08target/i386: Add a couple of feature bits in 8000_0008_EBXBabu Moger
2023-05-08target/i386: Add new EPYC CPU versions with updated cache_infoMichael Roth
2023-05-08target/i386: allow versioned CPUs to specify new cache_infoMichael Roth
2023-05-06Merge tag 'pull-loongarch-20230506' of https://gitlab.com/gaosong/qemu into s...Richard Henderson
2023-05-06target/loongarch: CPUCFG support LSXSong Gao
2023-05-06target/loongarch: Use {set/get}_gpr replace to cpu_fprSong Gao
2023-05-06target/loongarch: Implement vldiSong Gao
2023-05-06target/loongarch: Implement vld vstSong Gao
2023-05-06target/loongarch: Implement vilvl vilvh vextrins vshufSong Gao
2023-05-06target/loongarch: Implement vreplve vpack vpickSong Gao
2023-05-06target/loongarch: Implement vinsgr2vr vpickve2gr vreplgr2vrSong Gao
2023-05-06target/loongarch: Implement vbitsel vsetSong Gao
2023-05-06target/loongarch: Implement vfcmpSong Gao
2023-05-06target/loongarch: Implement vseq vsle vsltSong Gao
2023-05-06target/loongarch: Implement LSX fpu fcvt instructionsSong Gao
2023-05-06target/loongarch: Implement LSX fpu arith instructionsSong Gao
2023-05-06target/loongarch: Implement vfrstpSong Gao
2023-05-06target/loongarch: Implement vbitclr vbitset vbitrevSong Gao
2023-05-06target/loongarch: Implement vpcntSong Gao
2023-05-06target/loongarch: Implement vclo vclzSong Gao
2023-05-06target/loongarch: Implement vssrlrn vssrarnSong Gao
2023-05-06target/loongarch: Implement vssrln vssranSong Gao
2023-05-06target/loongarch: Implement vsrlrn vsrarnSong Gao
2023-05-06target/loongarch: Implement vsrln vsranSong Gao