| Age | Commit message (Expand) | Author |
|---|
| 2022-10-26 | accel/tcg: Make page_alloc_target_data allocation constant | Richard Henderson |
| 2022-10-24 | Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging | Stefan Hajnoczi |
| 2022-10-22 | target/i386: implement FMA instructions | Paolo Bonzini |
| 2022-10-20 | target/i386: implement F16C instructions | Paolo Bonzini |
| 2022-10-20 | target/i386: introduce function to set rounding mode from FPCW or MXCSR bits | Paolo Bonzini |
| 2022-10-20 | target/i386: decode-new: avoid out-of-bounds access to xmm_regs[-1] | Paolo Bonzini |
| 2022-10-20 | target/arm: Enable TARGET_TB_PCREL | Richard Henderson |
| 2022-10-20 | target/arm: Introduce gen_pc_plus_diff for aarch32 | Richard Henderson |
| 2022-10-20 | target/arm: Introduce gen_pc_plus_diff for aarch64 | Richard Henderson |
| 2022-10-20 | target/arm: Change gen_jmp* to work on displacements | Richard Henderson |
| 2022-10-20 | target/arm: Remove gen_exception_internal_insn pc argument | Richard Henderson |
| 2022-10-20 | target/arm: Change gen_exception_insn* to work on displacements | Richard Henderson |
| 2022-10-20 | target/arm: Change gen_*set_pc_im to gen_*update_pc | Richard Henderson |
| 2022-10-20 | target/arm: Change gen_goto_tb to work on displacements | Richard Henderson |
| 2022-10-20 | target/arm: Introduce curr_insn_len | Richard Henderson |
| 2022-10-20 | target/arm: Use bool consistently for get_phys_addr subroutines | Richard Henderson |
| 2022-10-20 | target/arm: Split out get_phys_addr_twostage | Richard Henderson |
| 2022-10-20 | target/arm: Use softmmu tlbs for page table walking | Richard Henderson |
| 2022-10-20 | target/arm: Move be test for regime into S1TranslateResult | Richard Henderson |
| 2022-10-20 | target/arm: Plumb debug into S1Translate | Richard Henderson |
| 2022-10-20 | target/arm: Split out S1Translate type | Richard Henderson |
| 2022-10-20 | target/arm: Restrict tlb flush from vttbr_write to vmid change | Richard Henderson |
| 2022-10-20 | target/arm: Move ARMMMUIdx_Stage2 to a real tlb mmu_idx | Richard Henderson |
| 2022-10-20 | target/arm: Add ARMMMUIdx_Phys_{S,NS} | Richard Henderson |
| 2022-10-20 | target/arm: Use probe_access_full for BTI | Richard Henderson |
| 2022-10-20 | target/arm: Use probe_access_full for MTE | Richard Henderson |
| 2022-10-20 | target/arm: Enable TARGET_PAGE_ENTRY_EXTRA | Richard Henderson |
| 2022-10-20 | target/arm: update the cortex-a15 MIDR to latest rev | Alex Bennée |
| 2022-10-18 | Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging | Stefan Hajnoczi |
| 2022-10-18 | Merge tag 'pull-ppc-20221017' of https://gitlab.com/danielhb/qemu into staging | Stefan Hajnoczi |
| 2022-10-18 | target/i386: remove old SSE decoder | Paolo Bonzini |
| 2022-10-18 | target/i386: move 3DNow to the new decoder | Paolo Bonzini |
| 2022-10-18 | target/i386: Enable AVX cpuid bits when using TCG | Paul Brook |
| 2022-10-18 | target/i386: implement VLDMXCSR/VSTMXCSR | Paolo Bonzini |
| 2022-10-18 | target/i386: implement XSAVE and XRSTOR of AVX registers | Paolo Bonzini |
| 2022-10-18 | target/i386: reimplement 0x0f 0x28-0x2f, add AVX | Paolo Bonzini |
| 2022-10-18 | target/i386: reimplement 0x0f 0x10-0x17, add AVX | Paolo Bonzini |
| 2022-10-18 | target/i386: reimplement 0x0f 0xc2, 0xc4-0xc6, add AVX | Paolo Bonzini |
| 2022-10-18 | target/i386: reimplement 0x0f 0x38, add AVX | Paolo Bonzini |
| 2022-10-18 | target/i386: Use tcg gvec ops for pmovmskb | Richard Henderson |
| 2022-10-18 | target/i386: reimplement 0x0f 0x3a, add AVX | Paolo Bonzini |
| 2022-10-18 | target/i386: clarify (un)signedness of immediates from 0F3Ah opcodes | Paolo Bonzini |
| 2022-10-18 | target/i386: reimplement 0x0f 0xd0-0xd7, 0xe0-0xe7, 0xf0-0xf7, add AVX | Paolo Bonzini |
| 2022-10-18 | target/i386: reimplement 0x0f 0x70-0x77, add AVX | Paolo Bonzini |
| 2022-10-18 | target/i386: reimplement 0x0f 0x78-0x7f, add AVX | Paolo Bonzini |
| 2022-10-18 | target/i386: reimplement 0x0f 0x50-0x5f, add AVX | Paolo Bonzini |
| 2022-10-18 | target/i386: reimplement 0x0f 0xd8-0xdf, 0xe8-0xef, 0xf8-0xff, add AVX | Paolo Bonzini |
| 2022-10-18 | target/i386: reimplement 0x0f 0x60-0x6f, add AVX | Paolo Bonzini |
| 2022-10-18 | target/i386: Introduce 256-bit vector helpers | Paolo Bonzini |
| 2022-10-18 | target/i386: implement additional AVX comparison operators | Paolo Bonzini |
