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QEMU is a generic and open source machine & userspace emulator and virtualizer
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2017-09-07
target/arm: Make MPU_RBAR, MPU_RLAR banked for v8M
Peter Maydell
2017-09-07
target/arm: Make MPU_MAIR0, MPU_MAIR1 registers banked for v8M
Peter Maydell
2017-09-07
target/arm: Make VTOR register banked for v8M
Peter Maydell
2017-09-07
target/arm: Make CONTROL register banked for v8M
Peter Maydell
2017-09-07
target/arm: Make FAULTMASK register banked for v8M
Peter Maydell
2017-09-07
target/arm: Make PRIMASK register banked for v8M
Peter Maydell
2017-09-07
target/arm: Make BASEPRI register banked for v8M
Peter Maydell
2017-09-07
target/arm: Add MMU indexes for secure v8M
Peter Maydell
2017-09-07
target/arm: Register second AddressSpace for secure v8M CPUs
Peter Maydell
2017-09-07
target/arm: Add state field, feature bit and migration for v8M secure state
Peter Maydell
2017-09-07
target/arm: Implement new PMSAv8 behaviour
Peter Maydell
2017-09-07
target/arm: Implement ARMv8M's PMSAv8 registers
Peter Maydell
2017-09-06
target/arm: Perform per-insn cross-page check only for Thumb
Richard Henderson
2017-09-06
target/arm: Split out thumb_tr_translate_insn
Richard Henderson
2017-09-06
target/arm: Move ss check to init_disas_context
Richard Henderson
2017-09-06
target/arm: [a64] Move page and ss checks to init_disas_context
Richard Henderson
2017-09-06
target/arm: [tcg] Port to generic translation framework
Lluís Vilanova
2017-09-06
target/arm: [tcg,a64] Port to disas_log
Lluís Vilanova
2017-09-06
target/arm: [tcg] Port to disas_log
Lluís Vilanova
2017-09-06
target/arm: [tcg,a64] Port to tb_stop
Lluís Vilanova
2017-09-06
target/arm: [tcg] Port to tb_stop
Lluís Vilanova
2017-09-06
target/arm: [tcg,a64] Port to translate_insn
Lluís Vilanova
2017-09-06
target/arm: [tcg] Port to translate_insn
Lluís Vilanova
2017-09-06
target/arm: [tcg,a64] Port to breakpoint_check
Lluís Vilanova
2017-09-06
target/arm: [tcg,a64] Port to insn_start
Lluís Vilanova
2017-09-06
target/arm: [tcg] Port to insn_start
Lluís Vilanova
2017-09-06
target/arm: [tcg] Port to tb_start
Lluís Vilanova
2017-09-06
target/arm: [tcg,a64] Port to init_disas_context
Lluís Vilanova
2017-09-06
target/arm: [tcg] Port to init_disas_context
Lluís Vilanova
2017-09-06
target/arm: [tcg] Port to DisasContextBase
Lluís Vilanova
2017-09-06
target/i386: [tcg] Port to generic translation framework
Lluís Vilanova
2017-09-06
target/i386: [tcg] Port to disas_log
Lluís Vilanova
2017-09-06
target/i386: [tcg] Port to tb_stop
Lluís Vilanova
2017-09-06
target/i386: [tcg] Port to translate_insn
Lluís Vilanova
2017-09-06
target/i386: [tcg] Port to breakpoint_check
Lluís Vilanova
2017-09-06
target/i386: [tcg] Port to insn_start
Lluís Vilanova
2017-09-06
target/i386: [tcg] Port to init_disas_context
Lluís Vilanova
2017-09-06
target/i386: [tcg] Port to DisasContextBase
Lluís Vilanova
2017-09-06
target/arm: Delay check for magic kernel page
Richard Henderson
2017-09-06
target: [tcg] Use a generic enum for DISAS_ values
Lluís Vilanova
2017-09-06
target/arm: Use DISAS_NORETURN
Richard Henderson
2017-09-06
target/i386: Use generic DISAS_* enumerators
Richard Henderson
2017-09-04
target/arm: Fix aa64 ldp register writeback
Richard Henderson
2017-09-04
target/arm: Allow deliver_fault() caller to specify EA bit
Peter Maydell
2017-09-04
target/arm: Factor out fault delivery code
Peter Maydell
2017-09-04
target/arm/kvm: pmu: improve error handling
Andrew Jones
2017-09-04
hw/arm/virt: allow pmu instantiation with userspace irqchip
Andrew Jones
2017-09-04
target/arm/kvm: pmu: split init and set-irq stages
Andrew Jones
2017-09-04
hw/arm/virt: add pmu interrupt state
Andrew Jones
2017-09-04
target/arm: Create and use new function arm_v7m_is_handler_mode()
Peter Maydell
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