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AgeCommit message (Expand)Author
2019-11-18Merge remote-tracking branch 'remotes/vivier2/tags/ppc-for-4.2-pull-request' ...Peter Maydell
2019-11-18spapr/kvm: Set default cpu model for all machine classesDavid Gibson
2019-11-14target/riscv: Remove atomic accesses to MIP CSRAlistair Francis
2019-11-14remove unnecessary ifdef TARGET_RISCV64hiroyuki.obinata
2019-11-12target/microblaze: Plug temp leak around eval_cond_jmp()Edgar E. Iglesias
2019-11-12target/microblaze: Plug temp leaks with delay slot setupEdgar E. Iglesias
2019-11-12target/microblaze: Plug temp leaks for loads/storesEdgar E. Iglesias
2019-11-06target/sparc: Define an enumeration for accessing env->regwptrRichard Henderson
2019-11-01target/arm: Allow reading flags from FPSCR for M-profileChristophe Lyon
2019-11-01target/arm/kvm: host cpu: Add support for sve<N> propertiesAndrew Jones
2019-11-01target/arm/cpu64: max cpu: Support sve properties with KVMAndrew Jones
2019-11-01target/arm/kvm: scratch vcpu: Preserve input kvm_vcpu_init featuresAndrew Jones
2019-11-01target/arm/kvm64: max cpu: Enable SVE when availableAndrew Jones
2019-11-01target/arm/kvm64: Add kvm_arch_get/put_sveAndrew Jones
2019-11-01target/arm/cpu64: max cpu: Introduce sve<N> propertiesAndrew Jones
2019-11-01target/arm: Allow SVE to be disabled via a CPU propertyAndrew Jones
2019-11-01target/arm/monitor: Introduce qmp_query_cpu_model_expansionAndrew Jones
2019-10-30Merge remote-tracking branch 'remotes/stsquad/tags/pull-tcg-plugins-281019-4'...Peter Maydell
2019-10-29Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20191028' into stagingPeter Maydell
2019-10-28target/riscv: PMP violation due to wrong size parameterDayeol Lee
2019-10-28target/openrisc: fetch code with translator_ldEmilio G. Cota
2019-10-28target/xtensa: fetch code with translator_ldEmilio G. Cota
2019-10-28target/sparc: fetch code with translator_ldEmilio G. Cota
2019-10-28target/riscv: fetch code with translator_ldEmilio G. Cota
2019-10-28target/alpha: fetch code with translator_ldEmilio G. Cota
2019-10-28target/m68k: fetch code with translator_ldEmilio G. Cota
2019-10-28target/hppa: fetch code with translator_ldEmilio G. Cota
2019-10-28target/i386: fetch code with translator_ldEmilio G. Cota
2019-10-28target/sh4: fetch code with translator_ldEmilio G. Cota
2019-10-28target/ppc: fetch code with translator_ldEmilio G. Cota
2019-10-28target/arm: fetch code with translator_ldEmilio G. Cota
2019-10-28cputlb: ensure _cmmu helper functions follow the naming standardAlex Bennée
2019-10-28target/riscv: Make the priv register writable by GDBJonathan Behrens
2019-10-28target/riscv: Expose "priv" register for GDB for readsJonathan Behrens
2019-10-28target/riscv: Tell gdbstub the correct number of CSRsJonathan Behrens
2019-10-28linux-user/riscv: Propagate fault addressGiuseppe Musacchio
2019-10-28RISC-V: Implement cpu_do_transaction_failedPalmer Dabbelt
2019-10-28RISC-V: Handle bus errors in the page table walkerPalmer Dabbelt
2019-10-28riscv: Skip checking CSR privilege level in debugger modeBin Meng
2019-10-28cputlb: ensure _cmmu helper functions follow the naming standardAlex Bennée
2019-10-26i386: implement IGNNEPaolo Bonzini
2019-10-26target/i386: introduce cpu_set_fpusPaolo Bonzini
2019-10-26target/i386: move FERR handling to target/i386Paolo Bonzini
2019-10-26core: replace getpagesize() with qemu_real_host_page_sizeWei Yang
2019-10-26Merge commit 'df84f17' into HEADPaolo Bonzini
2019-10-25target/mips: Refactor handling of vector compare 'less than' (signed) instruc...Filip Bozuta
2019-10-25target/mips: Refactor handling of vector compare 'equal' instructionsFilip Bozuta
2019-10-25target/mips: Demacro LMI decoderAleksandar Markovic
2019-10-25target/mips: msa: Split helpers for ASUB_<S|U>.<B|H|W|D>Aleksandar Markovic
2019-10-25target/mips: msa: Split helpers for HSUB_<S|U>.<H|W|D>Aleksandar Markovic