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QEMU is a generic and open source machine & userspace emulator and virtualizer
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2023-01-12
target/arm: Fix sve_probe_page
Richard Henderson
2023-01-11
target/i386: fix operand size of unary SSE operations
Paolo Bonzini
2023-01-11
target/i386: Remove compilation errors when -Werror=maybe-uninitialized
Eric Auger
2023-01-11
i386: Emit correct error code for 64-bit IDT entry
Joe Richey
2023-01-09
Merge tag 'pull-request-2023-01-09' of https://gitlab.com/thuth/qemu into sta...
Peter Maydell
2023-01-09
target/s390x: Restrict sysemu/reset.h to system emulation
Philippe Mathieu-Daudé
2023-01-09
target/s390x/tcg/excp_helper: Restrict system headers to sysemu
Philippe Mathieu-Daudé
2023-01-09
target/s390x/tcg/misc_helper: Remove unused "memory.h" include
Philippe Mathieu-Daudé
2023-01-09
hw/s390x/pv: Restrict Protected Virtualization to sysemu
Philippe Mathieu-Daudé
2023-01-08
Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging
Peter Maydell
2023-01-06
Merge tag 'pull-riscv-to-apply-20230106' of https://github.com/alistair23/qem...
Peter Maydell
2023-01-06
Merge tag 'pull-tcg-20230105' of https://gitlab.com/rth7680/qemu into staging
Peter Maydell
2023-01-06
Merge tag 'pull-hex-20230105' of https://github.com/quic/qemu into staging
Peter Maydell
2023-01-06
RISC-V: Add Zawrs ISA extension support
Christoph Muellner
2023-01-06
target/riscv: Clear mstatus.MPRV when leaving M-mode for priv spec 1.12+
Bin Meng
2023-01-06
target/riscv: Simplify helper_sret() a little bit
Bin Meng
2023-01-06
target/riscv: Set pc_succ_insn for !rvc illegal insn
Richard Henderson
2023-01-06
target/riscv: Fix mret exception cause when no pmp rule is configured
Bin Meng
2023-01-06
target/riscv: Add some comments for sstatus CSR in riscv_cpu_dump_state()
Bin Meng
2023-01-06
target/riscv: support cache-related PMU events in virtual mode
Jim Shu
2023-01-06
target/riscv: Typo fix in sstc() predicate
Anup Patel
2023-01-06
target/riscv: Add itrigger_enabled field to CPURISCVState
LIU Zhiwei
2023-01-06
target/riscv: Enable native debug itrigger
LIU Zhiwei
2023-01-06
target/riscv: Add itrigger support when icount is enabled
LIU Zhiwei
2023-01-06
target/riscv: Add itrigger support when icount is not enabled
LIU Zhiwei
2023-01-06
target/riscv: generate virtual instruction exception
Mayuresh Chitale
2023-01-06
target/riscv: smstateen check for h/s/envcfg
Mayuresh Chitale
2023-01-06
target/riscv: Add smstateen support
Mayuresh Chitale
2023-01-06
target/riscv: Fix PMP propagation for tlb
LIU Zhiwei
2023-01-06
target/i386: Add SGX aex-notify and EDECCSSA support
Kai Huang
2023-01-06
KVM: remove support for kernel-irqchip=off
Paolo Bonzini
2023-01-05
target/sparc: Avoid TCGV_{LOW,HIGH}
Richard Henderson
2023-01-05
Hexagon (target/hexagon) implement mutability mask for GPRs
Marco Liebel
2023-01-05
target/hexagon: suppress unused variable warning
Alessandro Di Federico
2023-01-05
target/hexagon/idef-parser: fix two typos in README
Matheus Tavares Bernardino
2023-01-05
target/hexagon: rename aliased register HEX_REG_P3_0
Mukilan Thiyagarajan
2023-01-05
target/arm: align exposed ID registers with Linux
Zhuojia Shen
2023-01-05
target/arm: cleanup cpu includes
Claudio Fontana
2023-01-05
target/arm: Remove unused includes from helper.c
Fabiano Rosas
2023-01-05
target/arm: Remove unused includes from m_helper.c
Fabiano Rosas
2023-01-05
target/arm: Fix checkpatch brace errors in helper.c
Fabiano Rosas
2023-01-05
target/arm: Fix checkpatch space errors in helper.c
Fabiano Rosas
2023-01-05
target/arm: Fix checkpatch comment style warnings in helper.c
Fabiano Rosas
2023-01-05
target/arm: fix handling of HLT semihosting in system mode
Alex Bennée
2023-01-05
target/arm: Add ARM Cortex-R52 CPU
Tobias Röhmel
2023-01-05
target/arm: Add PMSAv8r functionality
Tobias Röhmel
2023-01-05
target/arm: Add PMSAv8r registers
Tobias Röhmel
2023-01-05
target/arm: Enable TTBCR_EAE for ARMv8-R AArch32
Tobias Röhmel
2023-01-05
target/arm: Make stage_2_format for cache attributes optional
Tobias Röhmel
2023-01-05
target/arm: Make RVBAR available for all ARMv8 CPUs
Tobias Röhmel
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