Age | Commit message (Expand) | Author |
2018-03-02 | target/arm: Add Cortex-M33 | Peter Maydell |
2018-03-02 | target/arm: Define init-svtor property for the reset secure VTOR value | Peter Maydell |
2018-03-02 | target/arm: Define an IDAU interface | Peter Maydell |
2018-03-01 | Merge remote-tracking branch 'remotes/cohuck/tags/s390x-20180301-v2' into sta... | Peter Maydell |
2018-03-01 | s390x/tcg: fix loading 31bit PSWs with the highest bit set | David Hildenbrand |
2018-03-01 | target/arm: Enable ARM_V8_FP16 feature bit for the AArch64 "any" CPU | Peter Maydell |
2018-03-01 | arm/translate-a64: add all single op FP16 to handle_fp_1src_half | Alex Bennée |
2018-03-01 | arm/translate-a64: implement simd_scalar_three_reg_same_fp16 | Alex Bennée |
2018-03-01 | arm/translate-a64: add all FP16 ops in simd_scalar_pairwise | Alex Bennée |
2018-03-01 | arm/translate-a64: add FP16 FMOV to simd_mod_imm | Alex Bennée |
2018-03-01 | arm/translate-a64: add FP16 FRSQRTE to simd_two_reg_misc_fp16 | Alex Bennée |
2018-03-01 | arm/helper.c: re-factor rsqrte and add rsqrte_f16 | Alex Bennée |
2018-03-01 | arm/translate-a64: add FP16 FSQRT to simd_two_reg_misc_fp16 | Alex Bennée |
2018-03-01 | arm/translate-a64: add FP16 FRCPX to simd_two_reg_misc_fp16 | Alex Bennée |
2018-03-01 | arm/translate-a64: add FP16 FRECPE | Alex Bennée |
2018-03-01 | arm/helper.c: re-factor recpe and add recepe_f16 | Alex Bennée |
2018-03-01 | arm/translate-a64: add FP16 FNEG/FABS to simd_two_reg_misc_fp16 | Alex Bennée |
2018-03-01 | arm/translate-a64: add FP16 SCVTF/UCVFT to simd_two_reg_misc_fp16 | Alex Bennée |
2018-03-01 | arm/translate-a64: add FP16 FCMxx (zero) to simd_two_reg_misc_fp16 | Alex Bennée |
2018-03-01 | arm/translate-a64: add FCVTxx to simd_two_reg_misc_fp16 | Alex Bennée |
2018-03-01 | arm/translate-a64: add FP16 FPRINTx to simd_two_reg_misc_fp16 | Alex Bennée |
2018-03-01 | arm/translate-a64: initial decode for simd_two_reg_misc_fp16 | Alex Bennée |
2018-03-01 | arm/translate-a64: add FP16 x2 ops for simd_indexed | Alex Bennée |
2018-03-01 | arm/translate-a64: add FP16 FMULX/MLS/FMLA to simd_indexed | Alex Bennée |
2018-03-01 | arm/translate-a64: add FP16 pairwise ops simd_three_reg_same_fp16 | Alex Bennée |
2018-03-01 | arm/translate-a64: add FP16 FR[ECP/SQRT]S to simd_three_reg_same_fp16 | Alex Bennée |
2018-03-01 | arm/translate-a64: add FP16 FMULA/X/S to simd_three_reg_same_fp16 | Alex Bennée |
2018-03-01 | arm/translate-a64: add FP16 F[A]C[EQ/GE/GT] to simd_three_reg_same_fp16 | Alex Bennée |
2018-03-01 | arm/translate-a64: add FP16 FADD/FABD/FSUB/FMUL/FDIV to simd_three_reg_same_fp16 | Alex Bennée |
2018-03-01 | arm/translate-a64: initial decode for simd_three_reg_same_fp16 | Alex Bennée |
2018-03-01 | arm/translate-a64: handle_3same_64 comment fix | Alex Bennée |
2018-03-01 | arm/translate-a64: implement half-precision F(MIN|MAX)(V|NMV) | Alex Bennée |
2018-03-01 | target/arm/helper: pass explicit fpst to set_rmode | Alex Bennée |
2018-03-01 | target/arm/cpu.h: add additional float_status flags | Alex Bennée |
2018-03-01 | target/arm/cpu.h: update comment for half-precision values | Alex Bennée |
2018-03-01 | target/arm/cpu64: introduce ARM_V8_FP16 feature bit | Alex Bennée |
2018-02-26 | s390x: remove s390_get_memslot_count | Cornelia Huck |
2018-02-26 | s390x/sclp: remove memory hotplug support | David Hildenbrand |
2018-02-26 | s390x/cpumodel: document S390FeatDef.bit not applicable | Halil Pasic |
2018-02-26 | qmp: expose s390-specific CPU info | Viktor Mihajlovski |
2018-02-26 | s390x/tcg: add various alignment checks | David Hildenbrand |
2018-02-26 | s390x/tcg: fix disabling/enabling DAT | David Hildenbrand |
2018-02-26 | s390x/cpu: expose the guest crash information | Christian Borntraeger |
2018-02-22 | target/arm: Fix register definitions for VMIDR and VMPIDR | Peter Maydell |
2018-02-21 | target/*/cpu.h: remove softfloat.h | Alex Bennée |
2018-02-19 | mem: add share parameter to memory-backend-ram | Marcel Apfelbaum |
2018-02-16 | target/ppc: convert to TranslatorOps | Emilio G. Cota |
2018-02-16 | target/ppc: convert to DisasContextBase | Emilio G. Cota |
2018-02-15 | target/arm: Implement v8M MSPLIM and PSPLIM registers | Peter Maydell |
2018-02-15 | target/arm: Migrate v7m.other_sp | Peter Maydell |