aboutsummaryrefslogtreecommitdiff
path: root/target/xtensa
AgeCommit message (Expand)Author
2018-06-28move public invalidate APIs out of translate-all.{c,h}, clean upPaolo Bonzini
2018-06-08target/xtensa: Add trailing '\n' to qemu_log() callsPhilippe Mathieu-Daudé
2018-06-04Merge remote-tracking branch 'remotes/rth/tags/tcg-next-pull-request' into st...Peter Maydell
2018-06-01tcg: Pass tb and index to tcg_gen_exit_tb separatelyRichard Henderson
2018-06-01Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into stagingPeter Maydell
2018-06-01target: Do not include "exec/exec-all.h" if it is not necessaryPhilippe Mathieu-Daudé
2018-05-31target/xtensa: Include "qemu/timer.h" to use NANOSECONDS_PER_SECONDPhilippe Mathieu-Daudé
2018-05-31Make tb_invalidate_phys_addr() take a MemTxAttrs argumentPeter Maydell
2018-05-21Merge remote-tracking branch 'remotes/mjt/tags/trivial-patches-fetch' into st...Peter Maydell
2018-05-20Remove unnecessary variables for function return valueLaurent Vivier
2018-05-18target/xtensa: Honor CPU_DUMP_FPURichard Henderson
2018-05-11Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20180510'...Peter Maydell
2018-05-10target/xtensa: Use new min/max expandersRichard Henderson
2018-05-09target/xtensa: avoid integer overflow in next_page PC checkEmilio G. Cota
2018-04-11icount: fix cpu_restore_state_from_tb for non-tb-exit casesPavel Dovgalyuk
2018-03-26target/xtensa: fix timers testMax Filippov
2018-03-26target/xtensa/import_core.sh: fix #include <xtensa-isa.h>Max Filippov
2018-03-26target/xtensa: add .inc. to non-top level source file namesMax Filippov
2018-03-19cpu: get rid of unused cpu_init() definesIgor Mammedov
2018-03-19cpu: add CPU_RESOLVING_TYPE macroIgor Mammedov
2018-03-16target/xtensa: add linux-user supportMax Filippov
2018-03-13target/xtensa: support MTTCGMax Filippov
2018-03-13target/xtensa: use correct number of registers in gdbstubMax Filippov
2018-03-13target/xtensa: mark register windows in the dumpMax Filippov
2018-03-13target/xtensa: dump correct physical registersMax Filippov
2018-02-21target/*/cpu.h: remove softfloat.hAlex Bennée
2018-02-09Clean up includesMarkus Armbruster
2018-02-09Use #include "..." for our own headers, <...> for othersMarkus Armbruster
2018-02-05qdev: use device_class_set_parent_realize/unrealize/reset()Philippe Mathieu-Daudé
2018-01-25accel/tcg: add size paremeter in tlb_fill()Laurent Vivier
2018-01-24Merge remote-tracking branch 'remotes/xtensa/tags/20180122-xtensa' into stagingPeter Maydell
2018-01-22target/xtensa: disas/xtensa: fix coverity warningsMax Filippov
2018-01-22target/xtensa: add sample_controller coreMax Filippov
2018-01-22target/xtensa: allow different default CPU for MMU/noMMUMax Filippov
2018-01-12target/xtensa: Remove duplicate typedef of DisasContextPeter Maydell
2018-01-11target/xtensa: add de212 coreMax Filippov
2018-01-11target/xtensa: fix default sysrom/sysram addressesMax Filippov
2018-01-09target/xtensa: implement disassemblerMax Filippov
2018-01-09target/xtensa: implement const16Max Filippov
2018-01-09target/xtensa: implement GPIO32Max Filippov
2018-01-09target/xtensa: implement salt/saltuMax Filippov
2018-01-09target/xtensa: add internal/noop SRs and opcodesMax Filippov
2018-01-09target/xtensa: drop DisasContext::litbaseMax Filippov
2018-01-09target/xtensa: use libisa for instruction decodingMax Filippov
2017-12-18target/xtensa: switch fsf to libisaMax Filippov
2017-12-18target/xtensa: switch dc233c to libisaMax Filippov
2017-12-18target/xtensa: switch dc232b to libisaMax Filippov
2017-12-18target/xtensa: update import_core.sh script for libisaMax Filippov
2017-12-18target/xtensa: extract FPU2000 opcode translatorsMax Filippov
2017-12-18target/xtensa: extract core opcode translatorsMax Filippov
generated by cgit v1.2.3 (git 2.26.2) at 2024-12-17 05:28:57 +0000