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AgeCommit message (Expand)Author
2019-05-10tcg: Use CPUClass::tlb_fill in cputlb.cRichard Henderson
2019-05-10target/xtensa: Convert to CPUClass::tlb_fillRichard Henderson
2019-04-24tcg: Hoist max_insns computation to tb_gen_codeRichard Henderson
2019-04-18qom/cpu: Simplify how CPUClass:cpu_dump_state() printsMarkus Armbruster
2019-04-18target: Clean up how the dump_mmu() printMarkus Armbruster
2019-04-18target: Simplify how the TARGET_cpu_list() printMarkus Armbruster
2019-03-23target/xtensa: don't announce exit simcallMax Filippov
2019-03-21target/xtensa: fix break_dependency for repeated resourcesMax Filippov
2019-02-28target/xtensa: implement PREFCTL SRMax Filippov
2019-02-28target/xtensa: prioritize load/store in FLIX bundlesMax Filippov
2019-02-28target/xtensa: break circular register dependenciesMax Filippov
2019-02-28target/xtensa: reorganize access to boolean registersMax Filippov
2019-02-28target/xtensa: reorganize access to MAC16 registersMax Filippov
2019-02-28target/xtensa: reorganize register handling in translatorsMax Filippov
2019-02-28target/xtensa: only rotate window in the retw helperMax Filippov
2019-02-28target/xtensa: move WINDOW_BASE SR update to postprocessingMax Filippov
2019-02-28target/xtensa: add generic instruction post-processingMax Filippov
2019-02-28target/xtensa: sort FLIX instruction opcodesMax Filippov
2019-02-18target/xtensa: implement wide branches and loopsMax Filippov
2019-02-18target/xtensa: allow multiple names for single opcodeMax Filippov
2019-02-18target/xtensa: don't require opcode table sortingMax Filippov
2019-02-18target/xtensa: move xtensa_finalize_config to xtensa_core_class_initMax Filippov
2019-02-18target/xtensa: fixup test_mmuhifi_c3 overlayMax Filippov
2019-02-11target/xtensa: get rid of gen_callw[i]Max Filippov
2019-02-10target/xtensa: don't specify windowed registers manuallyMax Filippov
2019-02-08target/xtensa/import_core.sh: don't add duplicate 'static'Max Filippov
2019-01-28target/xtensa: add test_mmuhifi_c3 coreMax Filippov
2019-01-28target/xtensa: expose core runstall as an IRQ lineMax Filippov
2019-01-28target/xtensa: rearrange access to external interruptsMax Filippov
2019-01-28target/xtensa: drop function xtensa_timer_irqMax Filippov
2019-01-24target/xtensa: fix access to the INTERRUPT SRMax Filippov
2019-01-24target/xtensa: add qemu_cpu_kick to xtensa_runstallMax Filippov
2019-01-13target/xtensa: move non-HELPER functions to helper.cMax Filippov
2019-01-13target/xtensa: drop dump_state helperMax Filippov
2019-01-13target/xtensa: extract interrupt and exception helpersMax Filippov
2019-01-13target/xtensa: extract debug helpersMax Filippov
2019-01-13target/xtensa: extract MMU helpersMax Filippov
2019-01-13target/xtensa: extract windowed registers helpersMax Filippov
2019-01-13target/xtensa: extract FPU helpersMax Filippov
2019-01-11target/xtensa: rework zero overhead loops implementationMax Filippov
2018-11-20target/xtensa: drop num_[core_]regs from dc232b/dc233c configsMax Filippov
2018-11-20target/xtensa: gdbstub fix register countingMax Filippov
2018-10-01target/xtensa: extract gen_check_interrupts callMax Filippov
2018-10-01target/xtensa: make rsr/wsr helpers return voidMax Filippov
2018-10-01target/xtensa: extract unconditional TB termination via slot 0Max Filippov
2018-10-01target/xtensa: always end TB on CCOUNT access/CCOMPARE writeMax Filippov
2018-10-01target/xtensa: change SR number checks to assertionsMax Filippov
2018-10-01target/xtensa: extract unconditional TB terminationMax Filippov
2018-10-01target/xtensa: extract test for division by zeroMax Filippov
2018-10-01target/xtensa: extract test for cpdisabled exceptionMax Filippov