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path: root/target/xtensa/translate.c
AgeCommit message (Expand)Author
2018-01-09target/xtensa: implement const16Max Filippov
2018-01-09target/xtensa: implement GPIO32Max Filippov
2018-01-09target/xtensa: implement salt/saltuMax Filippov
2018-01-09target/xtensa: add internal/noop SRs and opcodesMax Filippov
2018-01-09target/xtensa: drop DisasContext::litbaseMax Filippov
2018-01-09target/xtensa: use libisa for instruction decodingMax Filippov
2017-12-18target/xtensa: extract FPU2000 opcode translatorsMax Filippov
2017-12-18target/xtensa: extract core opcode translatorsMax Filippov
2017-12-18target/xtensa: pass actual frame size to the entry helperMax Filippov
2017-10-27Merge remote-tracking branch 'remotes/rth/tags/pull-dis-20171026' into stagingPeter Maydell
2017-10-25disas: Remove unused flags argumentsRichard Henderson
2017-10-24tcg: Initialize cpu_env genericallyRichard Henderson
2017-10-24tcg: define tcg_init_ctx and make tcg_ctx a pointerEmilio G. Cota
2017-10-24tcg: convert tb->cflags reads to tb_cflags(tb)Emilio G. Cota
2017-09-06target: [tcg] Use a generic enum for DISAS_ valuesLluís Vilanova
2017-07-19tcg: Pass generic CPUState to gen_intermediate_code()Lluís Vilanova
2017-01-25Merge remote-tracking branch 'remotes/xtensa/tags/20170124-xtensa' into stagingPeter Maydell
2017-01-16target-xtensa: implement RER/WER instructionsMax Filippov
2017-01-15target/xtensa: implement MEMCTL SRMax Filippov
2017-01-15target/xtensa: don't continue translation after exceptionMax Filippov
2017-01-15target/xtensa: support icountMax Filippov
2017-01-15target/xtensa: refactor CCOUNT/CCOMPAREMax Filippov
2017-01-10target-xtensa: Use clrsb helperRichard Henderson
2017-01-10target-xtensa: Use clz opcodeRichard Henderson
2016-12-20Move target-* CPU file into a target/ folderThomas Huth