slackcoder/qemu - QEMU is a generic and open source machine & userspace emulator and virtualizer

Age	Commit message (Expand)	Author
2019-05-15	target/xtensa: implement exclusive access option	Max Filippov
2019-05-15	target/xtensa: implement block prefetch option opcodes	Max Filippov
2019-05-14	target/xtensa: implement DIWBUI.P opcode	Max Filippov
2019-05-10	target/xtensa: implement MPU option	Max Filippov
2019-05-10	target/xtensa: add parity/ECC option SRs	Max Filippov
2019-05-10	target/xtensa: get rid of centralized SR properties	Max Filippov
2019-04-24	tcg: Hoist max_insns computation to tb_gen_code	Richard Henderson
2019-04-18	qom/cpu: Simplify how CPUClass:cpu_dump_state() prints	Markus Armbruster
2019-03-21	target/xtensa: fix break_dependency for repeated resources	Max Filippov
2019-02-28	target/xtensa: implement PREFCTL SR	Max Filippov
2019-02-28	target/xtensa: prioritize load/store in FLIX bundles	Max Filippov
2019-02-28	target/xtensa: break circular register dependencies	Max Filippov
2019-02-28	target/xtensa: reorganize access to boolean registers	Max Filippov
2019-02-28	target/xtensa: reorganize access to MAC16 registers	Max Filippov
2019-02-28	target/xtensa: reorganize register handling in translators	Max Filippov
2019-02-28	target/xtensa: only rotate window in the retw helper	Max Filippov
2019-02-28	target/xtensa: move WINDOW_BASE SR update to postprocessing	Max Filippov
2019-02-28	target/xtensa: add generic instruction post-processing	Max Filippov
2019-02-28	target/xtensa: sort FLIX instruction opcodes	Max Filippov
2019-02-18	target/xtensa: implement wide branches and loops	Max Filippov
2019-02-18	target/xtensa: allow multiple names for single opcode	Max Filippov
2019-02-18	target/xtensa: don't require opcode table sorting	Max Filippov
2019-02-11	target/xtensa: get rid of gen_callw[i]	Max Filippov
2019-02-10	target/xtensa: don't specify windowed registers manually	Max Filippov
2019-01-24	target/xtensa: fix access to the INTERRUPT SR	Max Filippov
2019-01-11	target/xtensa: rework zero overhead loops implementation	Max Filippov
2018-10-01	target/xtensa: extract gen_check_interrupts call	Max Filippov
2018-10-01	target/xtensa: make rsr/wsr helpers return void	Max Filippov
2018-10-01	target/xtensa: extract unconditional TB termination via slot 0	Max Filippov
2018-10-01	target/xtensa: always end TB on CCOUNT access/CCOMPARE write	Max Filippov
2018-10-01	target/xtensa: change SR number checks to assertions	Max Filippov
2018-10-01	target/xtensa: extract unconditional TB termination	Max Filippov
2018-10-01	target/xtensa: extract test for division by zero	Max Filippov
2018-10-01	target/xtensa: extract test for cpdisabled exception	Max Filippov
2018-10-01	target/xtensa: extract test for alloca exception	Max Filippov
2018-10-01	target/xtensa: extract test for window underflow exception	Max Filippov
2018-10-01	target/xtensa: extract test for window overflow exception	Max Filippov
2018-10-01	target/xtensa: extract test for debug exception	Max Filippov
2018-10-01	target/xtensa: extract test for syscall instruction	Max Filippov
2018-10-01	target/xtensa: extract test for privileged instruction	Max Filippov
2018-10-01	target/xtensa: extract test for an illegal instruction	Max Filippov
2018-09-17	target/xtensa: fix s32c1i TCGMemOp flags	Max Filippov
2018-09-17	target/xtensa: fix FPU2000 bugs	Max Filippov
2018-06-30	target/xtensa: Convert to TranslatorOps	Richard Henderson
2018-06-30	target/xtensa: Change gen_intermediate_code dc to pointer	Richard Henderson
2018-06-30	target/xtensa: Convert to DisasContextBase	Richard Henderson
2018-06-30	target/xtensa: Replace DISAS_UPDATE with DISAS_NORETURN	Richard Henderson
2018-06-30	target/xtensa: check zero overhead loop alignment	Max Filippov
2018-06-08	target/xtensa: Add trailing '\n' to qemu_log() calls	Philippe Mathieu-Daudé
2018-06-01	tcg: Pass tb and index to tcg_gen_exit_tb separately	Richard Henderson