| Age | Commit message (Expand) | Author |
|---|---|---|
| 2019-02-18 | target/xtensa: move xtensa_finalize_config to xtensa_core_class_init | Max Filippov |
| 2019-01-11 | target/xtensa: rework zero overhead loops implementation | Max Filippov |
| 2018-06-30 | target/xtensa: check zero overhead loop alignment | Max Filippov |
| 2018-03-13 | target/xtensa: use correct number of registers in gdbstub | Max Filippov |
| 2018-01-11 | target/xtensa: fix default sysrom/sysram addresses | Max Filippov |
| 2017-02-23 | target/xtensa: sim: instantiate local memories | Max Filippov |
| 2017-01-16 | target-xtensa: implement RER/WER instructions | Max Filippov |
| 2017-01-15 | target/xtensa: implement MEMCTL SR | Max Filippov |
| 2017-01-15 | target/xtensa: fix ICACHE/DCACHE options detection | Max Filippov |
| 2017-01-15 | target/xtensa: add static vectors selection | Max Filippov |
| 2016-12-20 | Move target-* CPU file into a target/ folder | Thomas Huth |
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index : slackcoder/qemu | |
| QEMU is a generic and open source machine & userspace emulator and virtualizer | Mirror |
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