Age | Commit message (Expand) | Author |
---|---|---|
2019-01-24 | target/xtensa: fix access to the INTERRUPT SR | Max Filippov |
2019-01-13 | target/xtensa: drop dump_state helper | Max Filippov |
2019-01-11 | target/xtensa: rework zero overhead loops implementation | Max Filippov |
2018-10-01 | target/xtensa: extract test for window underflow exception | Max Filippov |
2018-10-01 | target/xtensa: extract test for an illegal instruction | Max Filippov |
2018-03-16 | target/xtensa: add linux-user support | Max Filippov |
2017-01-25 | Merge remote-tracking branch 'remotes/xtensa/tags/20170124-xtensa' into staging | Peter Maydell |
2017-01-16 | target-xtensa: implement RER/WER instructions | Max Filippov |
2017-01-15 | target/xtensa: implement MEMCTL SR | Max Filippov |
2017-01-15 | target/xtensa: refactor CCOUNT/CCOMPARE | Max Filippov |
2017-01-10 | target-xtensa: Use clz opcode | Richard Henderson |
2016-12-20 | Move target-* CPU file into a target/ folder | Thomas Huth |