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QEMU is a generic and open source machine & userspace emulator and virtualizer
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sparc
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Author
2017-03-02
target/sparc: Restore ldstub of odd asis
Richard Henderson
2017-02-24
cputlb and arm/sparc targets: convert mmuidx flushes from varg to bitmap
Alex Bennée
2017-02-21
monitor: Fix crashes when using HMP commands without CPU
Thomas Huth
2017-01-24
migration: extend VMStateInfo
Jianjun Duan
2017-01-18
target-sparc: add ST_BLKINIT_ ASIs for UA2005+ CPUs
Artyom Tarasenko
2017-01-18
target-sparc: store the UA2005 entries in sun4u format
Artyom Tarasenko
2017-01-18
target-sparc: implement UA2005 ASI_MMU (0x21)
Artyom Tarasenko
2017-01-18
target-sparc: add more registers to dump_mmu
Artyom Tarasenko
2017-01-18
target-sparc: implement auto-demapping for UA2005 CPUs
Artyom Tarasenko
2017-01-18
target-sparc: allow 256M sized pages
Artyom Tarasenko
2017-01-18
target-sparc: simplify ultrasparc_tsb_pointer
Artyom Tarasenko
2017-01-18
target-sparc: implement UA2005 TSB Pointers
Artyom Tarasenko
2017-01-18
target-sparc: use SparcV9MMU type for sparc64 I/D-MMUs
Artyom Tarasenko
2017-01-18
target-sparc: replace the last tlb entry when no free entries left
Artyom Tarasenko
2017-01-18
target-sparc: ignore writes to UA2005 CPU mondo queue register
Artyom Tarasenko
2017-01-18
target-sparc: allow priveleged ASIs in hyperprivileged mode
Artyom Tarasenko
2017-01-18
target-sparc: use direct address translation in hyperprivileged mode
Artyom Tarasenko
2017-01-18
target-sparc: fix immediate UA2005 traps
Artyom Tarasenko
2017-01-18
target-sparc: implement UA2005 rdhpstate and wrhpstate instructions
Artyom Tarasenko
2017-01-18
target-sparc: implement UA2005 GL register
Artyom Tarasenko
2017-01-18
target-sparc: implement UA2005 hypervisor traps
Artyom Tarasenko
2017-01-18
target-sparc: hypervisor mode takes over nucleus mode
Artyom Tarasenko
2017-01-18
target-sparc: implement UltraSPARC-T1 Strand status ASR
Artyom Tarasenko
2017-01-18
target-sparc: implement UA2005 scratchpad registers
Artyom Tarasenko
2017-01-18
target-sparc: simplify replace_tlb_entry by using TTE_PGSIZE
Artyom Tarasenko
2017-01-18
target-sparc: on UA2005 don't deliver Interrupt_level_n IRQs in hypervisor mode
Artyom Tarasenko
2017-01-18
target-sparc: add UltraSPARC T1 TLB #defines
Artyom Tarasenko
2017-01-18
target-sparc: add UA2005 TTE bit #defines
Artyom Tarasenko
2017-01-18
target-sparc: use explicit mmu register pointers
Artyom Tarasenko
2017-01-18
target-sparc: store cpu super- and hypervisor flags in TB
Artyom Tarasenko
2017-01-18
target-sparc: ignore MMU-faults if MMU is disabled in hypervisor mode
Artyom Tarasenko
2017-01-13
cputlb: drop flush_global flag from tlb_flush
Alex Bennée
2017-01-13
qom/cpu: move tlb_flush to cpu_common_reset
Alex Bennée
2017-01-10
target-sparc: Use ctpop helper
Richard Henderson
2016-12-20
Move target-* CPU file into a target/ folder
Thomas Huth
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