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path: root/target/sh4/translate.c
AgeCommit message (Expand)Author
2018-08-20sh4: fix use_icount with linux-userLaurent Vivier
2018-07-09target/sh4: Fix translator.c assertion failure for gUSARichard Henderson
2018-06-01tcg: Pass tb and index to tcg_gen_exit_tb separatelyRichard Henderson
2018-05-09target/sh4: convert to TranslatorOpsEmilio G. Cota
2017-12-29tcg: Remove TCGV_UNUSED* and TCGV_IS_UNUSED*Richard Henderson
2017-12-18target/sh4: Convert to DisasContextBaseRichard Henderson
2017-12-18target/sh4: Do not singlestep after exceptionsRichard Henderson
2017-12-18target/sh4: Convert to DisasJumpTypeRichard Henderson
2017-12-18target/sh4: Use cmpxchg for movco when parallel_cpusRichard Henderson
2017-12-18target/sh4: fix TCG leak during gusa sequenceAlex Bennée
2017-12-18target/sh4: add missing tcg_temp_free() in _decode_opc()Philippe Mathieu-Daudé
2017-12-18Remove empty statementsLadi Prosek
2017-10-27Merge remote-tracking branch 'remotes/rth/tags/pull-dis-20171026' into stagingPeter Maydell
2017-10-25disas: Remove unused flags argumentsRichard Henderson
2017-10-24tcg: Initialize cpu_env genericallyRichard Henderson
2017-10-24tcg: define tcg_init_ctx and make tcg_ctx a pointerEmilio G. Cota
2017-10-24target/sh4: check CF_PARALLEL instead of parallel_cpusEmilio G. Cota
2017-10-24tcg: convert tb->cflags reads to tb_cflags(tb)Emilio G. Cota
2017-10-24qom: Introduce CPUClass.tcg_initializeRichard Henderson
2017-10-10tcg: remove addr argument from lookup_tb_ptrEmilio G. Cota
2017-07-19tcg: Pass generic CPUState to gen_intermediate_code()Lluís Vilanova
2017-07-18target/sh4: Use tcg_gen_lookup_and_goto_ptrRichard Henderson
2017-07-18target/sh4: Implement fsrraRichard Henderson
2017-07-18target/sh4: Add missing FPSCR.PR == 0 checksRichard Henderson
2017-07-18target/sh4: Implement fpchgRichard Henderson
2017-07-18target/sh4: Introduce CHECK_SH4ARichard Henderson
2017-07-18target/sh4: Introduce CHECK_FPSCR_PR_*Richard Henderson
2017-07-18target/sh4: Tidy misc illegal insn checksRichard Henderson
2017-07-18target/sh4: Unify code for CHECK_FPU_ENABLEDRichard Henderson
2017-07-18target/sh4: Unify code for CHECK_PRIVILEGEDRichard Henderson
2017-07-18target/sh4: Unify code for CHECK_NOT_DELAY_SLOTRichard Henderson
2017-07-18target/sh4: Simplify 64-bit fp reg-reg moveRichard Henderson
2017-07-18target/sh4: Load/store Dr as 64-bit quantitiesRichard Henderson
2017-07-18target/sh4: Merge DREG into fpr64 routinesRichard Henderson
2017-07-18target/sh4: Eliminate unused XREG macroRichard Henderson
2017-07-18target/sh4: Hoist fp register bank selectionRichard Henderson
2017-07-18target/sh4: Pass DisasContext to fpr64 routinesRichard Henderson
2017-07-18target/sh4: Unify cpu_fregs into FREGRichard Henderson
2017-07-18target/sh4: Hoist register bank selectionRichard Henderson
2017-07-18target/sh4: Recognize common gUSA sequencesRichard Henderson
2017-07-18target/sh4: Handle user-space atomicsRichard Henderson
2017-07-18target/sh4: Introduce TB_FLAG_ENVFLAGS_MASKRichard Henderson
2017-07-18target/sh4: Consolidate end-of-TB testsRichard Henderson
2017-07-18target/sh4: return result of fcmp using TCGAurelien Jarno
2017-07-18target/sh4: do not use a helper to implement fnegAurelien Jarno
2017-07-18target/sh4: do not check for PR bit for fabs instructionAurelien Jarno
2017-05-30target/sh4: fix RTE instruction delay slotAurelien Jarno
2017-05-30target/sh4: introduce DELAY_SLOT_MASKAurelien Jarno
2017-05-13target/sh4: trap unaligned accessesAurelien Jarno
2017-05-13target/sh4: movua.l is an SH4-A only instructionAurelien Jarno