Age | Commit message (Expand) | Author |
2018-08-20 | sh4: fix use_icount with linux-user | Laurent Vivier |
2018-07-09 | target/sh4: Fix translator.c assertion failure for gUSA | Richard Henderson |
2018-06-01 | tcg: Pass tb and index to tcg_gen_exit_tb separately | Richard Henderson |
2018-05-09 | target/sh4: convert to TranslatorOps | Emilio G. Cota |
2017-12-29 | tcg: Remove TCGV_UNUSED* and TCGV_IS_UNUSED* | Richard Henderson |
2017-12-18 | target/sh4: Convert to DisasContextBase | Richard Henderson |
2017-12-18 | target/sh4: Do not singlestep after exceptions | Richard Henderson |
2017-12-18 | target/sh4: Convert to DisasJumpType | Richard Henderson |
2017-12-18 | target/sh4: Use cmpxchg for movco when parallel_cpus | Richard Henderson |
2017-12-18 | target/sh4: fix TCG leak during gusa sequence | Alex Bennée |
2017-12-18 | target/sh4: add missing tcg_temp_free() in _decode_opc() | Philippe Mathieu-Daudé |
2017-12-18 | Remove empty statements | Ladi Prosek |
2017-10-27 | Merge remote-tracking branch 'remotes/rth/tags/pull-dis-20171026' into staging | Peter Maydell |
2017-10-25 | disas: Remove unused flags arguments | Richard Henderson |
2017-10-24 | tcg: Initialize cpu_env generically | Richard Henderson |
2017-10-24 | tcg: define tcg_init_ctx and make tcg_ctx a pointer | Emilio G. Cota |
2017-10-24 | target/sh4: check CF_PARALLEL instead of parallel_cpus | Emilio G. Cota |
2017-10-24 | tcg: convert tb->cflags reads to tb_cflags(tb) | Emilio G. Cota |
2017-10-24 | qom: Introduce CPUClass.tcg_initialize | Richard Henderson |
2017-10-10 | tcg: remove addr argument from lookup_tb_ptr | Emilio G. Cota |
2017-07-19 | tcg: Pass generic CPUState to gen_intermediate_code() | Lluís Vilanova |
2017-07-18 | target/sh4: Use tcg_gen_lookup_and_goto_ptr | Richard Henderson |
2017-07-18 | target/sh4: Implement fsrra | Richard Henderson |
2017-07-18 | target/sh4: Add missing FPSCR.PR == 0 checks | Richard Henderson |
2017-07-18 | target/sh4: Implement fpchg | Richard Henderson |
2017-07-18 | target/sh4: Introduce CHECK_SH4A | Richard Henderson |
2017-07-18 | target/sh4: Introduce CHECK_FPSCR_PR_* | Richard Henderson |
2017-07-18 | target/sh4: Tidy misc illegal insn checks | Richard Henderson |
2017-07-18 | target/sh4: Unify code for CHECK_FPU_ENABLED | Richard Henderson |
2017-07-18 | target/sh4: Unify code for CHECK_PRIVILEGED | Richard Henderson |
2017-07-18 | target/sh4: Unify code for CHECK_NOT_DELAY_SLOT | Richard Henderson |
2017-07-18 | target/sh4: Simplify 64-bit fp reg-reg move | Richard Henderson |
2017-07-18 | target/sh4: Load/store Dr as 64-bit quantities | Richard Henderson |
2017-07-18 | target/sh4: Merge DREG into fpr64 routines | Richard Henderson |
2017-07-18 | target/sh4: Eliminate unused XREG macro | Richard Henderson |
2017-07-18 | target/sh4: Hoist fp register bank selection | Richard Henderson |
2017-07-18 | target/sh4: Pass DisasContext to fpr64 routines | Richard Henderson |
2017-07-18 | target/sh4: Unify cpu_fregs into FREG | Richard Henderson |
2017-07-18 | target/sh4: Hoist register bank selection | Richard Henderson |
2017-07-18 | target/sh4: Recognize common gUSA sequences | Richard Henderson |
2017-07-18 | target/sh4: Handle user-space atomics | Richard Henderson |
2017-07-18 | target/sh4: Introduce TB_FLAG_ENVFLAGS_MASK | Richard Henderson |
2017-07-18 | target/sh4: Consolidate end-of-TB tests | Richard Henderson |
2017-07-18 | target/sh4: return result of fcmp using TCG | Aurelien Jarno |
2017-07-18 | target/sh4: do not use a helper to implement fneg | Aurelien Jarno |
2017-07-18 | target/sh4: do not check for PR bit for fabs instruction | Aurelien Jarno |
2017-05-30 | target/sh4: fix RTE instruction delay slot | Aurelien Jarno |
2017-05-30 | target/sh4: introduce DELAY_SLOT_MASK | Aurelien Jarno |
2017-05-13 | target/sh4: trap unaligned accesses | Aurelien Jarno |
2017-05-13 | target/sh4: movua.l is an SH4-A only instruction | Aurelien Jarno |