| Age | Commit message (Expand) | Author |
|---|
| 2017-05-30 | target/sh4: fix RTE instruction delay slot | Aurelien Jarno |
| 2017-05-30 | target/sh4: introduce DELAY_SLOT_MASK | Aurelien Jarno |
| 2017-05-13 | target/sh4: trap unaligned accesses | Aurelien Jarno |
| 2017-05-13 | target/sh4: movua.l is an SH4-A only instruction | Aurelien Jarno |
| 2017-05-13 | target/sh4: implement tas.b using atomic helper | Aurelien Jarno |
| 2017-05-13 | target/sh4: generate fences for SH4 | Aurelien Jarno |
| 2017-05-13 | target/sh4: optimize gen_write_sr using extract op | Aurelien Jarno |
| 2017-05-13 | target/sh4: optimize gen_store_fpr64 | Aurelien Jarno |
| 2017-05-13 | target/sh4: fold ctx->bstate = BS_BRANCH into gen_conditional_jump | Aurelien Jarno |
| 2017-05-13 | target/sh4: only save flags state at the end of the TB | Aurelien Jarno |
| 2017-05-13 | target/sh4: fix BS_EXCP exit | Aurelien Jarno |
| 2017-05-13 | target/sh4: fix BS_STOP exit | Aurelien Jarno |
| 2017-05-13 | target/sh4: move DELAY_SLOT_TRUE flag into a separate global | Aurelien Jarno |
| 2017-05-13 | target/sh4: get rid of DELAY_SLOT_CLEARME | Aurelien Jarno |
| 2017-05-13 | target/sh4: split ctx->flags into ctx->tbflags and ctx->envflags | Aurelien Jarno |
| 2016-12-20 | Move target-* CPU file into a target/ folder | Thomas Huth |
