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2019-03-11s390x/tcg: Implement VECTOR UNPACK *David Hildenbrand
2019-03-11s390x/tcg: Implement VECTOR STORE WITH LENGTHDavid Hildenbrand
2019-03-11s390x/tcg: Implement VECTOR STORE MULTIPLEDavid Hildenbrand
2019-03-11s390x/tcg: Implement VECTOR STORE ELEMENTDavid Hildenbrand
2019-03-11s390x/tcg: Implement VECTOR STOREDavid Hildenbrand
2019-03-11s390x/tcg: Provide probe_write_access helperDavid Hildenbrand
2019-03-11s390x/tcg: Implement VECTOR SIGN EXTEND TO DOUBLEWORDDavid Hildenbrand
2019-03-11s390x/tcg: Implement VECTOR SELECTDavid Hildenbrand
2019-03-11s390x/tcg: Implement VECTOR SCATTER ELEMENTDavid Hildenbrand
2019-03-11s390x/tcg: Implement VECTOR REPLICATE IMMEDIATEDavid Hildenbrand
2019-03-11s390x/tcg: Implement VECTOR REPLICATEDavid Hildenbrand
2019-03-11s390x/tcg: Implement VECTOR PERMUTE DOUBLEWORD IMMEDIATEDavid Hildenbrand
2019-03-11s390x/tcg: Implement VECTOR PERMUTEDavid Hildenbrand
2019-03-11s390x/tcg: Implement VECTOR PACK *David Hildenbrand
2019-03-11s390x/tcg: Implement VECTOR MERGE (HIGH|LOW)David Hildenbrand
2019-03-11s390x/tcg: Implement VECTOR LOAD WITH LENGTHDavid Hildenbrand
2019-03-11s390x/tcg: Implement VECTOR LOAD VR FROM GRS DISJOINTDavid Hildenbrand
2019-03-11s390x/tcg: Implement VECTOR LOAD VR ELEMENT FROM GRDavid Hildenbrand
2019-03-11s390x/tcg: Implement VECTOR LOAD TO BLOCK BOUNDARYDavid Hildenbrand
2019-03-11s390x/tcg: Implement VECTOR LOAD MULTIPLEDavid Hildenbrand
2019-03-11s390x/tcg: Implement VECTOR LOAD LOGICAL ELEMENT AND ZERODavid Hildenbrand
2019-03-11s390x/tcg: Implement VECTOR LOAD GR FROM VR ELEMENTDavid Hildenbrand
2019-03-11s390x/tcg: Implement VECTOR LOAD ELEMENT IMMEDIATEDavid Hildenbrand
2019-03-11s390x/tcg: Implement VECTOR LOAD ELEMENTDavid Hildenbrand
2019-03-11s390x/tcg: Implement VECTOR LOAD AND REPLICATEDavid Hildenbrand
2019-03-11s390x/tcg: Implement VECTOR LOADDavid Hildenbrand
2019-03-11s390x/tcg: Implement VECTOR GENERATE MASKDavid Hildenbrand
2019-03-11s390x/tcg: Implement VECTOR GENERATE BYTE MASKDavid Hildenbrand
2019-03-11s390x/tcg: Implement VECTOR GATHER ELEMENTDavid Hildenbrand
2019-03-11s390x/tcg: Utilities for vector instruction helpersDavid Hildenbrand
2019-03-11s390x/tcg: Check vector register instructions at central pointDavid Hildenbrand
2019-03-11s390x/tcg: Define vector instruction formatsDavid Hildenbrand
2019-03-11target/s390x: Remove non-architected entries from struct LowCoreThomas Huth
2019-03-04s390x: Add floating-point extension facility to "qemu" cpu modelDavid Hildenbrand
2019-03-04s390x/tcg: Handle all rounding modes overwritten by BFP instructionsDavid Hildenbrand
2019-03-04s390x/tcg: Implement rounding mode and XxC for LOAD ROUNDEDDavid Hildenbrand
2019-03-04s390x/tcg: Implement XxC and checks for most FP instructionsDavid Hildenbrand
2019-03-04s390x/tcg: Prepare for IEEE-inexact-exception control (XxC)David Hildenbrand
2019-03-04s390x/tcg: Refactor saving/restoring the bfp rounding modeDavid Hildenbrand
2019-03-04s390x/tcg: Check for exceptions in SET BFP ROUNDING MODEDavid Hildenbrand
2019-03-04s390x/tcg: Handle SET FPC AND LOAD FPC 3-bit BFP rounding modesDavid Hildenbrand
2019-03-04s390x/tcg: Fix simulated-IEEE exceptionsDavid Hildenbrand
2019-03-04s390x/tcg: Refactor SET FPC AND SIGNAL handlingDavid Hildenbrand
2019-03-04s390x/tcg: Hide IEEE underflows in some scenariosDavid Hildenbrand
2019-03-04s390x/tcg: Fix parts of IEEE exception handlingDavid Hildenbrand
2019-03-04s390x/tcg: Factor out conversion of softfloat exceptionsDavid Hildenbrand
2019-03-04s390x/tcg: Fix rounding from float128 to uint64_t/uint32_tDavid Hildenbrand
2019-03-04s390x/tcg: Fix TEST DATA CLASS instructionsDavid Hildenbrand
2019-03-04s390x/tcg: Implement LOAD COUNT TO BLOCK BOUNDARYDavid Hildenbrand
2019-03-04s390x/tcg: Implement LOAD LENGTHENED short HFP to long HFPDavid Hildenbrand
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