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2020-05-19softfloat: Name compare relation enumRichard Henderson
Give the previously unnamed enum a typedef name. Use it in the prototypes of compare functions. Use it to hold the results of the compare functions. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2019-10-09target/s390x: Use tcg_s390_program_interrupt in TCG helpersRichard Henderson
Replace all uses of s390_program_interrupt within files that are marked CONFIG_TCG. These are necessarily tcg-only. This lets each of these users benefit from the QEMU_NORETURN attribute on tcg_s390_program_interrupt. Acked-by: David Hildenbrand <david@redhat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20191001171614.8405-5-richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com>
2019-10-09target/s390x: Remove ilen parameter from s390_program_interruptRichard Henderson
This is no longer used, and many of the existing uses -- particularly within hw/s390x -- seem questionable. Reviewed-by: David Hildenbrand <david@redhat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20191001171614.8405-4-richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com>
2019-06-10target/s390x: Use env_cpu, env_archcpuRichard Henderson
Cleanup in the boilerplate that each target must define. Replace s390_env_get_cpu with env_archcpu. The combination CPU(s390_env_get_cpu) should have used ENV_GET_CPU to begin; use env_cpu now. Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2019-06-07s390x/tcg: Export float_comp_to_cc() and float(32|64|128)_dcmask()David Hildenbrand
Vector floating-point instructions will require these functions, so allow to use them from other files. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com>
2019-03-04s390x/tcg: Handle all rounding modes overwritten by BFP instructionsDavid Hildenbrand
"round to nearest with ties away from 0" maps to float_round_ties_away. "round to prepare for shorter precision" maps to float_round_to_odd. As all instructions properly check for valid rounding modes in translate.c we can add an assert. Fix one missing empty line. Cc: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20190218122710.23639-15-david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2019-03-04s390x/tcg: Implement rounding mode and XxC for LOAD ROUNDEDDavid Hildenbrand
With the floating-point extension facility, LOAD ROUNDED has a rounding mode specification and the inexact-exception control (XxC). Handle them just like e.g. LOAD FP INTEGER. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20190218122710.23639-14-david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2019-03-04s390x/tcg: Implement XxC and checks for most FP instructionsDavid Hildenbrand
With the floating-point extension facility - CONVERT FROM LOGICAL - CONVERT TO LOGICAL - CONVERT TO FIXED - CONVERT FROM FIXED - LOAD FP INTEGER have both, a rounding mode specification and the inexact-exception control (XxC). Other instructions will be handled separatly. Check for valid rounding modes and forward also the XxC (via m4). To avoid a lot of boilerplate code and changes to the helpers, combine both, the m3 and m4 field in a combined 32 bit TCG variable. Perform checks at a central place, taking in account if the m3 or m4 field was ignore before the floating-point extension facility was introduced. Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20190218122710.23639-13-david@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2019-03-04s390x/tcg: Prepare for IEEE-inexact-exception control (XxC)David Hildenbrand
Some instructions allow to suppress IEEE inexact exceptions. z14 PoP, 9-23, "Suppression of Certain IEEE Exceptions" IEEE-inexact-exception control (XxC): Bit 1 of the M4 field is the XxC bit. If XxC is zero, recogni- tion of IEEE-inexact exception is not suppressed; if XxC is one, recognition of IEEE-inexact excep- tion is suppressed. Especially, handling for overflow/unerflow remains as is, inexact is reported along z14 PoP, 9-23, "Suppression of Certain IEEE Exceptions" For example, the IEEE-inexact-exception control (XxC) has no effect on the DXC; that is, the DXC for IEEE- overflow or IEEE-underflow exceptions along with the detail for exact, inexact and truncated, or inexact and incremented, is reported according to the actual con- dition. Follow up patches will wire it correctly up for the applicable instructions. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20190218122710.23639-12-david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2019-03-04s390x/tcg: Refactor saving/restoring the bfp rounding modeDavid Hildenbrand
We want to reuse this in the context of vector instructions. So use better matching names and introduce s390_restore_bfp_rounding_mode(). While at it, add proper newlines. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20190218122710.23639-11-david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2019-03-04s390x/tcg: Check for exceptions in SET BFP ROUNDING MODEDavid Hildenbrand
Let's split handling of BFP/DFP rounding mode configuration. Also, let's not reuse the sfpc handler, use a separate handler so we can properly check for specification exceptions for SRNMB. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20190218122710.23639-10-david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2019-03-04s390x/tcg: Handle SET FPC AND LOAD FPC 3-bit BFP rounding modesDavid Hildenbrand
We already forward the 3 bits correctly in the translation functions. We also have to handle them properly and check for specification exceptions. Setting an invalid rounding mode (BFP only, all DFP rounding modes) results in a specification exception. Setting unassigned bits in the fpc, results in a specification exception. This fixes LOAD FPC (AND SIGNAL), SET FPC (AND SIGNAL). Also for, SET BFP ROUNDING MODE, 3-bit rounding mode is now explicitly checked. Note: TCG_CALL_NO_WG is required for sfpc handler, as we now inject exceptions. We won't be modeling abscence of the "floating-point extension facility" for now, not necessary as most take the facility for granted without checking. z14 PoP, 9-23, "LOAD FPC" When the floating-point extension facility is installed, bits 29-31 of the second operand must specify a valid BFP rounding mode and bits 6-7, 14-15, 24, and 28 must be zero; otherwise, a specification exception is recognized. Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20190218122710.23639-9-david@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2019-03-04s390x/tcg: Fix simulated-IEEE exceptionsDavid Hildenbrand
The trap is triggered based on priority of the enabled signaling flags. Only overflow and underflow allow a concurrent inexact exception. z14 PoP, 9-33, Figure 9-21 Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20190218122710.23639-8-david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2019-03-04s390x/tcg: Refactor SET FPC AND SIGNAL handlingDavid Hildenbrand
We can directly work on the uint64_t value, no need for a temporary uint32_t value. Also cleanup and shorten the comments. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20190218122710.23639-7-david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2019-03-04s390x/tcg: Hide IEEE underflows in some scenariosDavid Hildenbrand
IEEE underflows are not reported when the mask bit is off and we don't also have an inexact exception. z14 PoP, 9-20, "IEEE Underflow": An IEEE-underflow exception is recognized for an IEEE target when the tininess condition exists and either: (1) the IEEE-underflow mask bit in the FPC register is zero and the result value is inexact, or (2) the IEEE-underflow mask bit in the FPC register is one. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20190218122710.23639-6-david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2019-03-04s390x/tcg: Fix parts of IEEE exception handlingDavid Hildenbrand
Many things are wrong and some parts cannot be fixed yet. Fix what we can fix easily and add two FIXMEs: The fpc flags are not updated in case an exception is actually injected. Inexact exceptions have to be handled separately, as they are the only exceptions that can coexist with underflows and overflows. I reread the horribly complicated chapters in the PoP at least 5 times and hope I got it right. For references: - z14 PoP, 9-18, "IEEE Exceptions" - z14 PoP, 19-9, Figure 19-8 Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20190218122710.23639-5-david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2019-03-04s390x/tcg: Factor out conversion of softfloat exceptionsDavid Hildenbrand
We want to reuse that function in vector instruction context. While at it, cleanup the code, using defines for magic values and avoiding the handcrafted bit conversion. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20190218122710.23639-4-david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2019-03-04s390x/tcg: Fix rounding from float128 to uint64_t/uint32_tDavid Hildenbrand
Let's use the proper conversion functions now that we have them. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20190218122710.23639-3-david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2019-03-04s390x/tcg: Fix TEST DATA CLASS instructionsDavid Hildenbrand
Let's detect normal and denormal ("subnormal") numbers reliably. Also test for quiet NaN's. As only one class is possible, test common cases first. While at it, use a better check to test for the mask bits in the data class mask. The data class mask has 12 bits, whereby bit 0 is the leftmost bit and bit 11 the rightmost bit. In the PoP an easy to read table with the numbers is provided for the VECTOR FP TEST DATA CLASS IMMEDIATE instruction, the table for TEST DATA CLASS is more confusing as it is based on 64 bit values. Factor the checks out into separate functions, as they will also be needed for floating point vector instructions. We can use a makro to generate the functions. Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20190218122710.23639-2-david@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2019-01-30target/s390x: Fix LGPL version in the file header commentsThomas Huth
It's either "GNU *Library* General Public License version 2" or "GNU Lesser General Public License version *2.1*", but there was no "version 2.0" of the "Lesser" license. So assume that version 2.1 is meant here. Signed-off-by: Thomas Huth <thuth@redhat.com> Acked-by: Cornelia Huck <cohuck@redhat.com> Message-Id: <1548769067-20792-1-git-send-email-thuth@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2018-10-04s390x/tcg: factor out and fix DATA exception injectionDavid Hildenbrand
The DXC is to be stored in the low core, and only in the FPC in case AFP is enabled in CR0. Stub is not required in current code, but this way we never run into problems. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20180927130303.12236-3-david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2018-05-17target/s390x: Remove floatX_maybe_silence_nan from conversionsRichard Henderson
This is now handled properly by the generic softfloat code. Cc: Alexander Graf <agraf@suse.de> Reviewed-by: David Hildenbrand <david@redhat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-02-21target/*/cpu.h: remove softfloat.hAlex Bennée
As cpu.h is another typically widely included file which doesn't need full access to the softfloat API we can remove the includes from here as well. Where they do need types it's typically for float_status and the rounding modes so we move that to softfloat-types.h as well. As a result of not having softfloat in every cpu.h call we now need to add it to various helpers that do need the full softfloat.h definitions. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> [For PPC parts] Acked-by: David Gibson <david@gibson.dropbear.id.au>
2017-12-14s390x/tcg: get rid of runtime_exception()David Hildenbrand
Let's use s390_program_interrupt() instead. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20171130162744.25442-3-david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2017-08-30target/s390x: introduce internal.hDavid Hildenbrand
cpu.h should only contain what really has to be accessed outside of target/s390x/. Add internal.h which can only be used inside target/s390x/. Move everything that isn't fast enough to run away and restructure it right away. We'll move all kvm_* stuff later. Minor style fixes to avoid checkpatch warning to: - struct Lowcore: "{" goes into same line as typedef - struct LowCore: add spaces around "-" in array length calculations - time2tod() and tod2time(): move "{" to separate line - get_per_atmid(): add space between ")" and "?". Move cases by one char. - get_per_atmid(): drop extra paremthesis around (1 << 6) Change license of new file to GPL2+ and keep copyright notice. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20170818114353.13455-15-david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2017-06-06target/s390x: implement COMPARE AND SIGNALAurelien Jarno
These functions differ from COMPARE by generating an exception for a QNaN input. Use the non quiet version of floatXX_compare. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Message-Id: <20170531220129.27724-10-aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
2016-12-20Move target-* CPU file into a target/ folderThomas Huth
We've currently got 18 architectures in QEMU, and thus 18 target-xxx folders in the root folder of the QEMU source tree. More architectures (e.g. RISC-V, AVR) are likely to be included soon, too, so the main folder of the QEMU sources slowly gets quite overcrowded with the target-xxx folders. To disburden the main folder a little bit, let's move the target-xxx folders into a dedicated target/ folder, so that target-xxx/ simply becomes target/xxx/ instead. Acked-by: Laurent Vivier <laurent@vivier.eu> [m68k part] Acked-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> [tricore part] Acked-by: Michael Walle <michael@walle.cc> [lm32 part] Acked-by: Cornelia Huck <cornelia.huck@de.ibm.com> [s390x part] Reviewed-by: Christian Borntraeger <borntraeger@de.ibm.com> [s390x part] Acked-by: Eduardo Habkost <ehabkost@redhat.com> [i386 part] Acked-by: Artyom Tarasenko <atar4qemu@gmail.com> [sparc part] Acked-by: Richard Henderson <rth@twiddle.net> [alpha part] Acked-by: Max Filippov <jcmvbkbc@gmail.com> [xtensa part] Reviewed-by: David Gibson <david@gibson.dropbear.id.au> [ppc part] Acked-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> [cris&microblaze part] Acked-by: Guan Xuetao <gxt@mprc.pku.edu.cn> [unicore32 part] Signed-off-by: Thomas Huth <thuth@redhat.com>
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