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2020-10-02s390: guest support for diagnose 0x318Collin Walling
DIAGNOSE 0x318 (diag318) is an s390 instruction that allows the storage of diagnostic information that is collected by the firmware in the case of hardware/firmware service events. QEMU handles the instruction by storing the info in the CPU state. A subsequent register sync will communicate the data to the hypervisor. QEMU handles the migration via a VM State Description. This feature depends on the Extended-Length SCCB (els) feature. If els is not present, then a warning will be printed and the SCLP bit that allows the Linux kernel to execute the instruction will not be set. Availability of this instruction is determined by byte 134 (aka fac134) bit 0 of the SCLP Read Info block. This coincidentally expands into the space used for CPU entries, which means VMs running with the diag318 capability may not be able to read information regarding all CPUs unless the guest kernel supports an extended-length SCCB. This feature is not supported in protected virtualization mode. Signed-off-by: Collin Walling <walling@linux.ibm.com> Acked-by: Janosch Frank <frankja@linux.ibm.com> Acked-by: Thomas Huth <thuth@redhat.com> Acked-by: David Hildenbrand <david@redhat.com> Acked-by: Claudio Imbrenda <imbrenda@linux.ibm.com> Message-Id: <20200915194416.107460-9-walling@linux.ibm.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2020-04-29s390x: Add SIDA memory opsJanosch Frank
Protected guests save the instruction control blocks in the SIDA instead of QEMU/KVM directly accessing the guest's memory. Let's introduce new functions to access the SIDA. The memops for doing so are available with KVM_CAP_S390_PROTECTED, so let's check for that. Signed-off-by: Janosch Frank <frankja@linux.ibm.com> Reviewed-by: David Hildenbrand <david@redhat.com> Reviewed-by: Christian Borntraeger <borntraeger@de.ibm.com> Reviewed-by: Claudio Imbrenda <imbrenda@linux.ibm.com> Reviewed-by: Cornelia Huck <cohuck@redhat.com> Message-Id: <20200319131921.2367-8-frankja@linux.ibm.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2020-02-27s390x: Rename and use constants for short PSW address and maskJanosch Frank
Let's rename PSW_MASK_ESA_ADDR to PSW_MASK_SHORT_ADDR because we're not working with a ESA PSW which would not support the extended addressing bit. Also let's actually use it. Additionally we introduce PSW_MASK_SHORT_CTRL and use it throughout the codebase. Signed-off-by: Janosch Frank <frankja@linux.ibm.com> Reviewed-by: Christian Borntraeger <borntraeger@de.ibm.com> Reviewed-by: David Hildenbrand <david@redhat.com> Message-Id: <20200227092341.38558-1-frankja@linux.ibm.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2020-01-15target/s390x: Use cpu_*_mmuidx_ra instead of MMU_MODE*_SUFFIXRichard Henderson
The generated functions aside from *_real are unused. The *_real functions have a couple of users in mem_helper.c; use *_mmuidx_ra instead, with MMU_REAL_IDX. Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: David Hildenbrand <david@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> --- v2: Use *_mmuidx_ra directly, without intermediate macros.
2019-12-18s390x: Properly fetch and test the short psw on diag308 subc 0/1Janosch Frank
We need to actually fetch the cpu mask and set it. As we invert the short psw indication in the mask, SIE will report a specification exception, if it wasn't present in the reset psw. Signed-off-by: Janosch Frank <frankja@linux.ibm.com> Reviewed-by: David Hildenbrand <david@redhat.com> Message-Id: <20191129142025.21453-2-frankja@linux.ibm.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2019-12-14s390x/tcg: clear local interrupts on reset normalCornelia Huck
We neglected to clean up pending interrupts and emergency signals; fix that. Message-Id: <20191206135404.16051-1-cohuck@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com> Reviewed-by: David Hildenbrand <david@redhat.com>
2019-12-14s390x: Fix cpu normal reset ri clearingJanosch Frank
As it turns out we need to clear the ri controls and PSW enablement bit to be architecture compliant. Signed-off-by: Janosch Frank <frankja@linux.ibm.com> Reviewed-by: Christian Borntraeger <borntraeger@de.ibm.com> Message-Id: <20191203132813.2734-4-frankja@linux.ibm.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2019-12-14s390x: Move initial resetJanosch Frank
Let's move the intial reset into the reset handler and cleanup afterwards. Signed-off-by: Janosch Frank <frankja@linux.ibm.com> Reviewed-by: David Hildenbrand <david@redhat.com> Message-Id: <20191128083723.11937-1-frankja@linux.ibm.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2019-12-14s390x: Move reset normal to shared reset handlerJanosch Frank
Let's start moving the cpu reset functions into a single function with a switch/case, so we can later use fallthroughs and share more code between resets. This patch introduces the reset function by renaming cpu_reset(). Signed-off-by: Janosch Frank <frankja@linux.ibm.com> Reviewed-by: David Hildenbrand <david@redhat.com> Message-Id: <20191127175046.4911-3-frankja@linux.ibm.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2019-10-09target/s390x: Remove ILEN_UNWINDRichard Henderson
This setting is no longer used. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20191001171614.8405-19-richard.henderson@linaro.org> Reviewed-by: David Hildenbrand <david@redhat.com> Signed-off-by: David Hildenbrand <david@redhat.com>
2019-10-09target/s390x: Remove ILEN_AUTORichard Henderson
This setting is no longer used. Reviewed-by: David Hildenbrand <david@redhat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20191001171614.8405-16-richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com>
2019-10-09target/s390x: Remove ilen parameter from s390_program_interruptRichard Henderson
This is no longer used, and many of the existing uses -- particularly within hw/s390x -- seem questionable. Reviewed-by: David Hildenbrand <david@redhat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20191001171614.8405-4-richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com>
2019-10-09target/s390x: Add ilen to unwind dataRichard Henderson
Use ILEN_UNWIND to signal that we have in fact that cpu_restore_state will have been called by the time we arrive in do_program_interrupt. Signed-off-by: Richard Henderson <rth@twiddle.net> Message-Id: <20191001171614.8405-2-richard.henderson@linaro.org> Reviewed-by: David Hildenbrand <david@redhat.com> Signed-off-by: David Hildenbrand <david@redhat.com>
2019-10-09s390x/mmu: Implement Instruction-Execution-Protection FacilityDavid Hildenbrand
IEP support in the mmu is fairly easy. Set the right permissions for TLB entries and properly report an exception. Make sure to handle EDAT-2 by setting bit 56/60/61 of the TEID (TEC) to the right values. Let's keep s390_cpu_get_phys_page_debug() working even if IEP is active. Switch MMU_DATA_LOAD - this has no other effects any more as the ASC to be used is now fully selected outside of mmu_translate(). Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: David Hildenbrand <david@redhat.com>
2019-10-09s390x/mmu: DAT table definition overhaulDavid Hildenbrand
Let's use consistent names for the region/section/page table entries and for the macros to extract relevant parts from virtual address. Make them match the definitions in the PoP - e.g., how the relevant bits are actually called. Introduce defines for all bits declared in the PoP. This will come in handy in follow-up patches. Add a note where additional information about s390x and the used definitions can be found. Acked-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: David Hildenbrand <david@redhat.com>
2019-09-23s390x/tcg: Always use MMU_USER_IDX for CONFIG_USER_ONLYDavid Hildenbrand
Although we basically ignore the index all the time for CONFIG_USER_ONLY, let's simply skip all the checks and always return MMU_USER_IDX in cpu_mmu_index() and get_mem_index(). Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com>
2019-08-22s390x/tcg: Rework MMU selection for instruction fetchesDavid Hildenbrand
Instructions are always fetched from primary address space, except when in home address mode. Perform the selection directly in cpu_mmu_index(). get_mem_index() is only used to perform data access, instructions are fetched via cpu_lduw_code(), which translates to cpu_mmu_index(env, true). We don't care about restricting the access permissions of the TLB entries anymore, as we no longer enter PRIMARY entries into the SECONDARY MMU. Cleanup related code a bit. Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: David Hildenbrand <david@redhat.com> Reviewed-by: Cornelia Huck <cohuck@redhat.com> Message-Id: <20190816084708.602-4-david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2019-08-16migration: Move the VMStateDescription typedef to typedefs.hMarkus Armbruster
We declare incomplete struct VMStateDescription in a couple of places so we don't have to include migration/vmstate.h for the typedef. That's fine with me. However, the next commit will drop migration/vmstate.h from a massive number of compiles. Move the typedef to qemu/typedefs.h now, so I don't have to insert struct in front of VMStateDescription all over the place then. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20190812052359.30071-15-armbru@redhat.com>
2019-06-12Include qemu-common.h exactly where neededMarkus Armbruster
No header includes qemu-common.h after this commit, as prescribed by qemu-common.h's file comment. Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20190523143508.25387-5-armbru@redhat.com> [Rebased with conflicts resolved automatically, except for include/hw/arm/xlnx-zynqmp.h hw/arm/nrf51_soc.c hw/arm/msf2-soc.c block/qcow2-refcount.c block/qcow2-cluster.c block/qcow2-cache.c target/arm/cpu.h target/lm32/cpu.h target/m68k/cpu.h target/mips/cpu.h target/moxie/cpu.h target/nios2/cpu.h target/openrisc/cpu.h target/riscv/cpu.h target/tilegx/cpu.h target/tricore/cpu.h target/unicore32/cpu.h target/xtensa/cpu.h; bsd-user/main.c and net/tap-bsd.c fixed up]
2019-06-10cpu: Remove CPU_COMMONRichard Henderson
This macro is now always empty, so remove it. This leaves the entire contents of CPUArchState under the control of the guest architecture. Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2019-06-10cpu: Introduce CPUNegativeOffsetStateRichard Henderson
Nothing in there so far, but all of the plumbing done within the target ArchCPU state. Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2019-06-10cpu: Move ENV_OFFSET to exec/gen-icount.hRichard Henderson
Now that we have ArchCPU, we can define this generically, in the one place that needs it. Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2019-06-10target/s390x: Use env_cpu, env_archcpuRichard Henderson
Cleanup in the boilerplate that each target must define. Replace s390_env_get_cpu with env_archcpu. The combination CPU(s390_env_get_cpu) should have used ENV_GET_CPU to begin; use env_cpu now. Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2019-06-10cpu: Replace ENV_GET_CPU with env_cpuRichard Henderson
Now that we have both ArchCPU and CPUArchState, we can define this generically instead of via macro in each target's cpu.h. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2019-06-10cpu: Define ArchCPURichard Henderson
For all targets, do this just before including exec/cpu-all.h. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2019-06-10cpu: Define CPUArchState with typedefRichard Henderson
For all targets, do this just before including exec/cpu-all.h. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2019-06-10tcg: Split out target/arch/cpu-param.hRichard Henderson
For all targets, into this new file move TARGET_LONG_BITS, TARGET_PAGE_BITS, TARGET_PHYS_ADDR_SPACE_BITS, TARGET_VIRT_ADDR_SPACE_BITS, and NB_MMU_MODES. Include this new file from exec/cpu-defs.h. This now removes the somewhat odd requirement that target/arch/cpu.h defines TARGET_LONG_BITS before including exec/cpu-defs.h, so push the bulk of the includes within target/arch/cpu.h to the top. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2019-06-07s390x/tcg: Introduce tcg_s390_vector_exception()David Hildenbrand
Handling is similar to data exceptions, however we can always store the VXC into the lowore and the FPC: z14 PoP, 6-20, "Vector-Exception Code" When a vector-processing exception causes a pro- gram interruption, a vector-exception code (VXC) is stored at location 147, and zeros are stored at loca- tions 144-146. The VXC is also placed in the DXC field of the floating-point-control (FPC) register if bit 45 of control register 0 is one. When bit 45 of control register 0 is zero and bit 46 of control register 0 is one, the DXC field of the FPC register and the con- tents of storage at location 147 are unpredictable. Signed-off-by: David Hildenbrand <david@redhat.com>
2019-06-07s390x: Use uint64_t for vector registersDavid Hildenbrand
CPU_DoubleU is primarily used to reinterpret between integer and floats. We don't really need this functionality. So let's just keep it simple and use an uint64_t. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com>
2019-06-07s390x: Align vector registers to 16 bytesDavid Hildenbrand
11e2bfef7990 ("tcg/i386: Use MOVDQA for TCG_TYPE_V128 load/store") revealed that the vregs are not aligned to 16 bytes. Align them to 16 bytes, to avoid segfault'ing on x86. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com>
2019-04-25s390x/kvm: Configure page size after memory has actually been initializedDavid Hildenbrand
Right now we configure the pagesize quite early, when initializing KVM. This is long before system memory is actually allocated via memory_region_allocate_system_memory(), and therefore memory backends marked as mapped. Instead, let's configure the maximum page size after initializing memory in s390_memory_init(). cap_hpage_1m is still properly configured before creating any CPUs, and therefore before configuring the CPU model and eventually enabling CMMA. This is not a fix but rather a preparation for the future, when initial memory might reside on memory backends (not the case for s390x right now) We will replace qemu_getrampagesize() soon by a function that will always return the maximum page size (not the minimum page size, which only works by pure luck so far, as there are no memory backends). Acked-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20190417113143.5551-2-david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2019-04-18target: Simplify how the TARGET_cpu_list() printMarkus Armbruster
The various TARGET_cpu_list() take an fprintf()-like callback and a FILE * to pass to it. Their callers (vl.c's main() via list_cpus(), bsd-user/main.c's main(), linux-user/main.c's main()) all pass fprintf() and stdout. Thus, the flexibility provided by the (rather tiresome) indirection isn't actually used. Drop the callback, and call qemu_printf() instead. Calling printf() would also work, but would make the code unsuitable for monitor context without making it simpler. Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20190417191805.28198-10-armbru@redhat.com> Reviewed-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
2019-03-11s390x/tcg: Check vector register instructions at central pointDavid Hildenbrand
Check them at a central point. We'll use a new instruction flag to flag all vector instructions (IF_VEC) and handle it very similar to AFP, whereby we use another unused position in the PSW mask to store the state of vector register enablement per translation block. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20190307121539.12842-3-david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2019-02-18s390x: Fix the confusing contributions-after-2012 license statementsThomas Huth
The license information in these files is rather confusing. The text declares LGPL first, but then says that contributions after 2012 are licensed under the GPL instead. How should the average user who just downloaded the release tarball know which part is now GPL and which is LGPL? Looking at the text of the LGPL (see COPYING.LIB in the top directory), the license clearly states how this should be done instead: "3. You may opt to apply the terms of the ordinary GNU General Public License instead of this License to a given copy of the Library. To do this, you must alter all the notices that refer to this License, so that they refer to the ordinary GNU General Public License, version 2, instead of to this License." Thus let's clean up the confusing statements and use the proper GPL text only. Signed-off-by: Thomas Huth <thuth@redhat.com> Message-Id: <1549456893-16589-1-git-send-email-thuth@redhat.com> Acked-by: Laurent Vivier <laurent@vivier.eu> Acked-by: Christian Borntraeger <borntraeger@de.ibm.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2019-02-04target/s390x: define TCG_GUEST_DEFAULT_MO for MTTCGAlex Bennée
MTTCG should be enabled by default whenever the memory model allows it. s390x was missing its definition of TCG_GUEST_DEFAULT_MO meaning the user had to manually specify --accel tcg,thread=multi. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Cc: David Hildenbrand <david@redhat.com> Message-Id: <20190118171848.27332-1-alex.bennee@linaro.org> Reviewed-by: David Hildenbrand <david@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2018-10-04s390x/tcg: store in the TB flags if AFP is enabledDavid Hildenbrand
We exit the TB when changing the control registers, so just like PSW bits, this should always be consistent for a TB. Using the PSW bit semantic makes things a lot easier compared to manually defining the spare, shifted bits. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20180927130303.12236-4-david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2018-10-04s390x/tcg: factor out and fix DATA exception injectionDavid Hildenbrand
The DXC is to be stored in the low core, and only in the FPC in case AFP is enabled in CR0. Stub is not required in current code, but this way we never run into problems. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20180927130303.12236-3-david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2018-08-20s390x/kvm: add etoken facilityChristian Borntraeger
Provide the etoken facility. We need to handle cpu model, migration and clear reset. Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com> Acked-by: Janosch Frank <frankja@linux.ibm.com> Message-Id: <20180731090448.36662-3-borntraeger@de.ibm.com> Reviewed-by: David Hildenbrand <david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2018-08-20s390x: remove 's390-squash-mcss' optionCornelia Huck
This option has been deprecated for two releases; remove it. Acked-by: Christian Borntraeger <borntraeger@de.ibm.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Acked-by: Halil Pasic <pasic@linux.ibm.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2018-07-02s390x/tcg: properly implement the TODDavid Hildenbrand
Right now, each CPU has its own TOD. Especially, the TOD will differ based on creation time of a CPU - e.g. when hotplugging a CPU the times will differ quite a lot, resulting in stall warnings in the guest. Let's use a single TOD by implementing our new TOD device. Prepare it for TOD-clock epoch extension. Most importantly, whenever we set the TOD, we have to update the CKC timer. Introduce "tcg_s390x.h" just like "kvm_s390x.h" for tcg specific function declarations that should not go into cpu.h. Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20180627134410.4901-6-david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2018-07-02s390x/tcg: drop tod_basetimeDavid Hildenbrand
Never set to anything but 0. Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20180627134410.4901-5-david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2018-07-02s390x/tod: factor out TOD into separate deviceDavid Hildenbrand
Let's treat this like a separate device. TCG will have to store the actual state/time later on. Include cpu-qom.h in kvm_s390x.h (due to S390CPU) to compile tod-kvm.c. Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20180627134410.4901-4-david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2018-05-14s390x: refactor reset/reipl handlingDavid Hildenbrand
Calling pause_all_vcpus()/resume_all_vcpus() from a VCPU thread might not be the best idea. As pause_all_vcpus() temporarily drops the qemu mutex, two parallel calls to pause_all_vcpus() can be active at a time, resulting in a deadlock. (either by two VCPUs or by the main thread and a VCPU) Let's handle it via the main loop instead, as suggested by Paolo. If we would have two parallel reset requests by two different VCPUs at the same time, the last one would win. We use the existing ipl device to handle it. The nice side effect is that we can get rid of reipl_requested. This change implies that all reset handling now goes via the common path, so "no-reboot" handling is now active for all kinds of reboots. Let's execute any CPU initialization code on the target CPU using run_on_cpu. Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20180424101859.10239-1-david@redhat.com> Acked-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2018-03-19cpu: get rid of unused cpu_init() definesIgor Mammedov
cpu_init(cpu_model) were replaced by cpu_create(cpu_type) so no users are left, remove it. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Acked-by: David Gibson <david@gibson.dropbear.id.au> (ppc) Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Message-Id: <1518000027-274608-6-git-send-email-imammedo@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2018-03-19cpu: add CPU_RESOLVING_TYPE macroIgor Mammedov
it will be used for providing to cpu name resolving class for parsing cpu model for system and user emulation code. Along with change add target to null-machine tests, so that when switch to CPU_RESOLVING_TYPE happens, it would ensure that null-machine usecase still works. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Laurent Vivier <laurent@vivier.eu> (m68k) Acked-by: David Gibson <david@gibson.dropbear.id.au> (ppc) Acked-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> (tricore) Message-Id: <1518000027-274608-4-git-send-email-imammedo@redhat.com> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> [ehabkost: Added macro to riscv too] Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2018-03-08target/s390x: Remove leading underscores from #definesThomas Huth
We should not use leading underscores followed by a capital letter in #defines since such identifiers are reserved by the C standard. For ASCE_ORIGIN, REGION_ENTRY_ORIGIN and SEGMENT_ENTRY_ORIGIN I also added parentheses around the value to silence an error message from checkpatch.pl. Signed-off-by: Thomas Huth <thuth@redhat.com> Message-Id: <1520227018-4061-1-git-send-email-thuth@redhat.com> Reviewed-by: David Hildenbrand <david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2018-02-26s390x: remove s390_get_memslot_countCornelia Huck
Not needed anymore after removal of the memory hotplug code. Acked-by: Christian Borntraeger <borntraeger@de.ibm.com> Reviewed-by: David Hildenbrand <david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2018-02-26s390x/sclp: remove memory hotplug supportDavid Hildenbrand
From an architecture point of view, nothing can be mapped into the address space on s390x. All there is is memory. Therefore there is also not really an interface to communicate such information to the guest. All we can do is specify the maximum ram address and guests can probe in that range if memory is available and usable (TPROT). Also memory hotplug is strange. The guest can decide at some point in time to add / remove memory in some range. While the hypervisor can deny to online an increment, all increments have to be predefined and there is no way of telling the guest about a newly "hotplugged" increment. So if we specify right now e.g. -m 2G,slots=2,maxmem=20G An ordinary fedora guest will happily online (hotplug) all memory, resulting in a guest consuming 20G. So it really behaves rather like -m 22G There is no way to hotplug memory from the outside like on other architectures. This is of course bad for upper management layers. As the guest can create/delete memory regions while it is running, of course migration support is not available and tricky to implement. With virtualization, it is different. We might want to map something into guest address space (e.g. fake DAX devices) and not detect it automatically as memory. So we really want to use the maxmem and slots parameter just like on all other architectures. Such devices will have to expose the applicable memory range themselves. To finally be able to provide memory hotplug to guests, we will need a new paravirtualized interface to do that (e.g. something into the direction of virtio-mem). This implies, that maxmem cannot be used for s390x memory hotplug anymore and has to go. This simplifies the code quite a bit. As migration support is not working, this change cannot really break migration as guests without slots and maxmem don't see the SCLP features. Also, the ram size calculation does not change. Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20180219174231.10874-1-david@redhat.com> Reviewed-by: Christian Borntraeger <borntraeger@de.ibm.com> Acked-by: Matthew Rosato <mjrosato@linux.vnet.ibm.com> [CH: tweaked patch description, as discussed on list] Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2018-02-26qmp: expose s390-specific CPU infoViktor Mihajlovski
Presently s390x is the only architecture not exposing specific CPU information via QMP query-cpus. Upstream discussion has shown that it could make sense to report the architecture specific CPU state, e.g. to detect that a CPU has been stopped. With this change the output of query-cpus will look like this on s390: [ {"arch": "s390", "current": true, "props": {"core-id": 0}, "cpu-state": "operating", "CPU": 0, "qom_path": "/machine/unattached/device[0]", "halted": false, "thread_id": 63115}, {"arch": "s390", "current": false, "props": {"core-id": 1}, "cpu-state": "stopped", "CPU": 1, "qom_path": "/machine/unattached/device[1]", "halted": true, "thread_id": 63116} ] This change doesn't add the s390-specific data to HMP 'info cpus'. A follow-on patch will remove all architecture specific information from there. Signed-off-by: Viktor Mihajlovski <mihajlov@linux.vnet.ibm.com> Reviewed-by: David Hildenbrand <david@redhat.com> Reviewed-by: Christian Borntraeger <borntraeger@de.ibm.com> Reviewed-by: Eric Blake <eblake@redhat.com> Message-Id: <1518797321-28356-2-git-send-email-mihajlov@linux.vnet.ibm.com> Reviewed-by: Cornelia Huck <cohuck@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2018-02-26s390x/tcg: fix disabling/enabling DATDavid Hildenbrand
Currently, all memory accesses go via the MMU of the address space (primary, secondary, ...). This is bad, because we don't flush the TLB when disabling/enabling DAT. So we could add a tlb flush. However it is easier to simply select the MMU we already have in place for real memory access. All we have to do is point at the right MMU and allow to execute these pages. Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20180213161240.19891-1-david@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> [CH: get rid of tabs] Signed-off-by: Cornelia Huck <cohuck@redhat.com>
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