index
:
slackcoder/qemu
master
QEMU is a generic and open source machine & userspace emulator and virtualizer
Mirror
about
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
target
/
riscv
Age
Commit message (
Expand
)
Author
2023-07-19
target/riscv: Fix LMUL check to use VLEN
Rob Bradford
2023-07-19
target/riscv/cpu.c: check priv_ver before auto-enable zca/zcd/zcf
Daniel Henrique Barboza
2023-07-15
accel/tcg: Return bool from page_check_range
Richard Henderson
2023-07-10
riscv: Add support for the Zfa extension
Christoph Müllner
2023-07-10
target/riscv/kvm.c: read/write (cbom|cboz)_blocksize in KVM
Daniel Henrique Barboza
2023-07-10
target/riscv/kvm.c: add kvmconfig_get_cfg_addr() helper
Daniel Henrique Barboza
2023-07-10
target/riscv: update multi-letter extension KVM properties
Daniel Henrique Barboza
2023-07-10
target/riscv/cpu.c: create KVM mock properties
Daniel Henrique Barboza
2023-07-10
target/riscv/cpu.c: remove priv_ver check from riscv_isa_string_ext()
Daniel Henrique Barboza
2023-07-10
target/riscv/cpu.c: add satp_mode properties earlier
Daniel Henrique Barboza
2023-07-10
target/riscv/kvm.c: add multi-letter extension KVM properties
Daniel Henrique Barboza
2023-07-10
target/riscv/kvm.c: update KVM MISA bits
Daniel Henrique Barboza
2023-07-10
target/riscv: add KVM specific MISA properties
Daniel Henrique Barboza
2023-07-10
target/riscv/cpu: add misa_ext_info_arr[]
Daniel Henrique Barboza
2023-07-10
target/riscv/kvm.c: init 'misa_ext_mask' with scratch CPU
Daniel Henrique Barboza
2023-07-10
target/riscv: handle mvendorid/marchid/mimpid for KVM CPUs
Daniel Henrique Barboza
2023-07-10
target/riscv: read marchid/mimpid in kvm_riscv_init_machine_ids()
Daniel Henrique Barboza
2023-07-10
target/riscv: use KVM scratch CPUs to init KVM properties
Daniel Henrique Barboza
2023-07-10
target/riscv/cpu.c: restrict 'marchid' value
Daniel Henrique Barboza
2023-07-10
target/riscv/cpu.c: restrict 'mimpid' value
Daniel Henrique Barboza
2023-07-10
target/riscv/cpu.c: restrict 'mvendorid' value
Daniel Henrique Barboza
2023-07-10
target/riscv: skip features setup for KVM CPUs
Daniel Henrique Barboza
2023-07-10
target/riscv KVM_RISCV_SET_TIMER macro is not configured correctly
yang.zhang
2023-07-10
target/riscv: Set the correct exception for implict G-stage translation fail
Jason Chien
2023-07-10
target/riscv: Expose properties for BF16 extensions
Weiwei Li
2023-07-10
target/riscv: Add support for Zvfbfwma extension
Weiwei Li
2023-07-10
target/riscv: Add support for Zvfbfmin extension
Weiwei Li
2023-07-10
target/riscv: Add support for Zfbfmin extension
Weiwei Li
2023-07-10
target/riscv: Add properties for BF16 extensions
Weiwei Li
2023-07-10
target/riscv: Add RVV registers to log
Ivan Klokov
2023-07-10
target/riscv: update cur_pmbase/pmmask based on mode affected by MPRV
Weiwei Li
2023-07-10
target/riscv: Add additional xlen for address when MPRV=1
Weiwei Li
2023-07-10
target/riscv/cpu.c: fix veyron-v1 CPU properties
Daniel Henrique Barboza
2023-07-10
target/riscv: Remove redundant assignment to SXL
Weiwei Li
2023-07-10
target/riscv: Support MSTATUS.MPV/GVA only when RVH is enabled
Weiwei Li
2023-07-10
target/riscv: Make MPV only work when MPP != PRV_M
Weiwei Li
2023-07-10
disas/riscv: Add support for XThead* instructions
Christoph Müllner
2023-07-10
target/riscv: Factor out extension tests to cpu_cfg.h
Christoph Müllner
2023-07-10
target/riscv: Use xl instead of mxl for disassemble
LIU Zhiwei
2023-07-09
target/riscv: Use aesdec_ISB_ISR_IMC_AK
Richard Henderson
2023-07-09
target/riscv: Use aesenc_SB_SR_MC_AK
Richard Henderson
2023-07-09
target/riscv: Use aesdec_IMC
Richard Henderson
2023-07-09
target/riscv: Use aesdec_ISB_ISR_AK
Richard Henderson
2023-07-09
target/riscv: Use aesenc_SB_SR_AK
Richard Henderson
2023-06-28
target/riscv: Restrict KVM-specific fields from ArchCPU
Philippe Mathieu-Daudé
2023-06-26
target: Widen pc/cs_base in cpu_get_tb_cpu_state
Anton Johansson
2023-06-20
meson: Replace softmmu_ss -> system_ss
Philippe Mathieu-Daudé
2023-06-13
target/riscv: Smepmp: Return error when access permission not allowed in PMP
Himanshu Chauhan
2023-06-13
target/riscv/vector_helper.c: Remove the check for extra tail elements
Xiao Wang
2023-06-13
target/riscv/vector_helper.c: clean up reference of MTYPE
Xiao Wang
[next]