slackcoder/qemu - QEMU is a generic and open source machine & userspace emulator and virtualizer

Age	Commit message (Expand)	Author
2023-11-07	hw/cpu: Call object_class_is_abstract() once in cpu_class_by_name()	Philippe Mathieu-Daudé
2023-11-07	target: Move ArchCPUClass definition to 'cpu.h'	Philippe Mathieu-Daudé
2023-11-07	target/riscv: Use env_archcpu() in [check_]nanbox()	Philippe Mathieu-Daudé
2023-11-07	target/riscv: Move TYPE_RISCV_CPU_BASE definition to 'cpu.h'	Philippe Mathieu-Daudé
2023-11-07	target/riscv: Remove CPU_RESOLVING_TYPE from 'cpu-qom.h'	Philippe Mathieu-Daudé
2023-11-07	target: Unify QOM style	Philippe Mathieu-Daudé
2023-11-07	target/riscv: Add "pmu-mask" property to replace "pmu-num"	Rob Bradford
2023-11-07	target/riscv: Use existing PMU counter mask in FDT generation	Rob Bradford
2023-11-07	target/riscv: Don't assume PMU counters are continuous	Rob Bradford
2023-11-07	target/riscv: Propagate error from PMU setup	Rob Bradford
2023-11-07	target/riscv: cpu: Set the OpenTitan priv to 1.12.0	Alistair Francis
2023-11-07	target/riscv: Move vector crypto extensions to riscv_cpu_extensions	Max Chou
2023-11-07	target/riscv: Expose Zvks[c\|g] extnesion properties	Max Chou
2023-11-07	target/riscv: Add cfg properties for Zvks[c\|g] extensions	Max Chou
2023-11-07	target/riscv: Expose Zvkn[c\|g] extnesion properties	Max Chou
2023-11-07	target/riscv: Add cfg properties for Zvkn[c\|g] extensions	Max Chou
2023-11-07	target/riscv: Expose Zvkb extension property	Max Chou
2023-11-07	target/riscv: Replace Zvbb checking by Zvkb	Max Chou
2023-11-07	target/riscv: Add cfg property for Zvkb extension	Max Chou
2023-11-07	target/riscv: Expose Zvkt extension property	Max Chou
2023-11-07	target/riscv: Add cfg property for Zvkt extension	Max Chou
2023-11-07	target/riscv: correct csr_ops[CSR_MSECCFG]	Heinrich Schuchardt
2023-11-07	target/riscv/kvm: add zicsr, zifencei, zba, zbs, svnapot	Daniel Henrique Barboza
2023-11-07	target/riscv/kvm: add zihpm reg	Daniel Henrique Barboza
2023-11-07	target/riscv: add zihpm extension flag for TCG	Daniel Henrique Barboza
2023-11-07	target/riscv/kvm: add zicntr reg	Daniel Henrique Barboza
2023-11-07	target/riscv: add zicntr extension flag for TCG	Daniel Henrique Barboza
2023-11-07	target/riscv: pmp: Ignore writes when RW=01	Mayuresh Chitale
2023-11-07	target/riscv: pmp: Clear pmp/smepmp bits on reset	Mayuresh Chitale
2023-11-07	Add epmp to extensions list and rename it to smepmp	Himanshu Chauhan
2023-11-07	target/riscv/riscv-qmp-cmds.c: check CPU accel in query-cpu-model-expansion	Daniel Henrique Barboza
2023-11-07	target/riscv: add riscv_cpu_accelerator_compatible()	Daniel Henrique Barboza
2023-11-07	target/riscv: handle custom props in qmp_query_cpu_model_expansion	Daniel Henrique Barboza
2023-11-07	target/riscv/tcg: add tcg_cpu_finalize_features()	Daniel Henrique Barboza
2023-11-07	qapi,risc-v: add query-cpu-model-expansion	Daniel Henrique Barboza
2023-11-07	target/riscv/kvm/kvm-cpu.c: add missing property getters()	Daniel Henrique Barboza
2023-11-07	target/riscv: Add HS-mode virtual interrupt and IRQ filtering support.	Rajnesh Kanwal
2023-11-07	target/riscv: Add M-mode virtual interrupt and IRQ filtering support.	Rajnesh Kanwal
2023-11-07	target/riscv: Split interrupt logic from riscv_cpu_update_mip.	Rajnesh Kanwal
2023-11-07	target/riscv: Set VS* bits to one in mideleg when H-Ext is enabled	Rajnesh Kanwal
2023-11-07	target/riscv: Check for async flag in case of RISCV_EXCP_SEMIHOST.	Rajnesh Kanwal
2023-11-07	target/riscv: Without H-mode mask all HS mode inturrupts in mie.	Rajnesh Kanwal
2023-11-07	target/riscv: rename ext_icboz to ext_zicboz	Daniel Henrique Barboza
2023-11-07	target/riscv: rename ext_icbom to ext_zicbom	Daniel Henrique Barboza
2023-11-07	target/riscv: rename ext_icsr to ext_zicsr	Daniel Henrique Barboza
2023-11-07	target/riscv: rename ext_ifencei to ext_zifencei	Daniel Henrique Barboza
2023-10-25	kvm: require KVM_IRQFD for kernel irqchip	Paolo Bonzini
2023-10-12	target/riscv: Fix vfwmaccbf16.vf	Max Chou
2023-10-12	target/riscv: deprecate capital 'Z' CPU properties	Daniel Henrique Barboza
2023-10-12	target/riscv: Use env_archcpu for better performance	Richard W.M. Jones