Age | Commit message (Expand) | Author |
---|---|---|
2020-07-02 | target/riscv: vector integer add-with-carry / subtract-with-borrow instructions | LIU Zhiwei |
2020-07-02 | target/riscv: vector widening integer add and subtract | LIU Zhiwei |
2020-07-02 | target/riscv: vector single-width integer add and subtract | LIU Zhiwei |
2020-07-02 | target/riscv: add vector amo operations | LIU Zhiwei |
2020-07-02 | target/riscv: add fault-only-first unit stride load | LIU Zhiwei |
2020-07-02 | target/riscv: add vector index load and store instructions | LIU Zhiwei |
2020-07-02 | target/riscv: add vector stride load and store instructions | LIU Zhiwei |
2020-07-02 | target/riscv: add vector configure instruction | LIU Zhiwei |