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path: root/target/riscv/pmp.c
AgeCommit message (Expand)Author
2020-08-21target/riscv: Change the TLB page size depends on PMP entries.Zong Li
2020-08-21riscv: Fix bug in setting pmpcfg CSR for RISCV64Hou Weiying
2020-07-13target/riscv: Fix pmp NA4 implementationAlexandre Mergnat
2020-06-19target/riscv: Use a smaller guess size for no-MMU PMPAlistair Francis
2019-10-28target/riscv: PMP violation due to wrong size parameterDayeol Lee
2019-09-17target/riscv/pmp: Convert qemu_log_mask(LOG_TRACE) to trace eventsPhilippe Mathieu-Daudé
2019-09-17target/riscv/pmp: Restrict priviledged PMP to system-mode emulationPhilippe Mathieu-Daudé
2019-06-23RISC-V: Fix a PMP bug where it succeeds even if PMP entry is offHesham Almatary
2019-06-23RISC-V: Check for the effective memory privilege mode during PMP checksHesham Almatary
2019-06-23target/riscv: Fix PMP range boundary address bugDayeol Lee
2019-06-12Include qemu-common.h exactly where neededMarkus Armbruster
2019-03-19riscv: pmp: Log pmp access errors as guest errorsAlistair Francis
2018-12-20target/riscv/pmp.c: Fix pmp_decode_napot()Anup Patel
2018-10-30target/riscv/pmp.c: pmpcfg_csr_read returns bogus value on RV64Dayeol Lee
2018-03-07RISC-V Physical Memory ProtectionMichael Clark