aboutsummaryrefslogtreecommitdiff
path: root/target/riscv/insn_trans
AgeCommit message (Expand)Author
2022-06-10target/riscv: rvv: Add tail agnostic for vector integer shift instructionseopXD
2022-06-10target/riscv: rvv: Add tail agnostic for vx, vvm, vxm instructionseopXD
2022-06-10target/riscv: rvv: Add tail agnostic for vector load / store instructionseopXD
2022-06-10target/riscv: rvv: Add tail agnostic for vv instructionseopXD
2022-06-10target/riscv: rvv: Early exit when vstart >= vleopXD
2022-06-10target/riscv: add support for zmmul extension v0.1Weiwei Li
2022-05-24target/riscv: rvv: Fix early exit condition for whole register load/storeeopXD
2022-04-29target/riscv: rvk: add support for zksed/zksh extensionWeiwei Li
2022-04-29target/riscv: rvk: add support for sha512 related instructions for RV64 in zk...Weiwei Li
2022-04-29target/riscv: rvk: add support for sha512 related instructions for RV32 in zk...Weiwei Li
2022-04-29target/riscv: rvk: add support for sha256 related instructions in zknh extensionWeiwei Li
2022-04-29target/riscv: rvk: add support for zkne/zknd extension in RV64Weiwei Li
2022-04-29target/riscv: rvk: add support for zknd/zkne extension in RV32Weiwei Li
2022-04-29target/riscv: rvk: add support for zbkx extensionWeiwei Li
2022-04-29target/riscv: rvk: add support for zbkc extensionWeiwei Li
2022-04-29target/riscv: rvk: add support for zbkb extensionWeiwei Li
2022-04-22target/riscv: optimize helper for vmv<nr>r.vWeiwei Li
2022-04-22target/riscv: optimize condition assign for scale < 0Weiwei Li
2022-04-06Replace config-time define HOST_WORDS_BIGENDIANMarc-André Lureau
2022-04-01target/riscv: rvv: Add missing early exit condition for whole register load/s...Yueh-Ting (eop) Chen
2022-03-03target/riscv: add support for zhinx/zhinxminWeiwei Li
2022-03-03target/riscv: add support for zdinxWeiwei Li
2022-03-03target/riscv: add support for zfinxWeiwei Li
2022-03-03target/riscv: fix inverted checks for ext_zb[abcs]Philipp Tomsich
2022-02-16target/riscv: add support for svinval extensionWeiwei Li
2022-02-16target/riscv: Add XVentanaCondOps custom extensionPhilipp Tomsich
2022-02-16target/riscv: access cfg structure through DisasContextPhilipp Tomsich
2022-02-16target/riscv: access configuration through cfg_ptr in DisasContextPhilipp Tomsich
2022-01-21target/riscv: Adjust scalar reg in vector with XLENLIU Zhiwei
2022-01-21target/riscv: Calculate address according to XLENLIU Zhiwei
2022-01-21target/riscv: Adjust csr write mask with XLENLIU Zhiwei
2022-01-21target/riscv: Sign extend pc for different XLENLIU Zhiwei
2022-01-21target/riscv: Sign extend link reg for jal and jalrLIU Zhiwei
2022-01-21target/riscv: Don't save pc when exception returnLIU Zhiwei
2022-01-21target/riscv: rvv-1.0: Add Zve32f support for narrowing type-convert insnsFrank Chang
2022-01-21target/riscv: rvv-1.0: Add Zve32f support for widening type-convert insnsFrank Chang
2022-01-21target/riscv: rvv-1.0: Add Zve32f support for single-width fp reduction insnsFrank Chang
2022-01-21target/riscv: rvv-1.0: Add Zve32f support for scalar fp insnsFrank Chang
2022-01-21target/riscv: rvv-1.0: Add Zve32f support for configuration insnsFrank Chang
2022-01-21target/riscv: rvv-1.0: Add Zve64f support for narrowing type-convert insnsFrank Chang
2022-01-21target/riscv: rvv-1.0: Add Zve64f support for widening type-convert insnsFrank Chang
2022-01-21target/riscv: rvv-1.0: Add Zve64f support for single-width fp reduction insnsFrank Chang
2022-01-21target/riscv: rvv-1.0: Add Zve64f support for scalar fp insnsFrank Chang
2022-01-21target/riscv: rvv-1.0: Add Zve64f support for vsmul.vv and vsmul.vx insnsFrank Chang
2022-01-21target/riscv: rvv-1.0: Add Zve64f support for vmulh variant insnsFrank Chang
2022-01-21target/riscv: rvv-1.0: Add Zve64f support for load and store insnsFrank Chang
2022-01-21target/riscv: rvv-1.0: Add Zve64f support for configuration insnsFrank Chang
2022-01-08target/riscv: modification of the trans_csrxx for 128-bit supportFrédéric Pétrot
2022-01-08target/riscv: support for 128-bit M extensionFrédéric Pétrot
2022-01-08target/riscv: support for 128-bit arithmetic instructionsFrédéric Pétrot
generated by cgit v1.2.3 (git 2.26.2) at 2025-03-16 09:14:20 +0000