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path: root/target/riscv/helper.h
AgeCommit message (Expand)Author
2022-01-21target/riscv: Don't save pc when exception returnLIU Zhiwei
2022-01-08target/riscv: helper functions to wrap calls to 128-bit csr insnsFrédéric Pétrot
2022-01-08target/riscv: support for 128-bit M extensionFrédéric Pétrot
2021-12-20target/riscv: rvv-1.0: rename vmandnot.mm and vmornot.mm to vmandn.mm and vmo...Frank Chang
2021-12-20target/riscv: rvv-1.0: add vector unit-stride mask load/store insnsFrank Chang
2021-12-20target/riscv: rvv-1.0: floating-point reciprocal estimate instructionFrank Chang
2021-12-20target/riscv: rvv-1.0: floating-point reciprocal square-root estimate instruc...Frank Chang
2021-12-20target/riscv: rvv-1.0: implement vstart CSRFrank Chang
2021-12-20target/riscv: rvv-1.0: narrowing floating-point/integer type-convertFrank Chang
2021-12-20target/riscv: add "set round to odd" rounding mode helper functionFrank Chang
2021-12-20target/riscv: rvv-1.0: widening floating-point/integer type-convertFrank Chang
2021-12-20target/riscv: rvv-1.0: remove vmford.vv and vmford.vfFrank Chang
2021-12-20target/riscv: rvv-1.0: remove widening saturating scaled multiply-addFrank Chang
2021-12-20target/riscv: rvv-1.0: narrowing fixed-point clip instructionsFrank Chang
2021-12-20target/riscv: rvv-1.0: floating-point slide instructionsFrank Chang
2021-12-20target/riscv: rvv-1.0: narrowing integer right shift instructionsFrank Chang
2021-12-20target/riscv: rvv-1.0: single-width averaging add and subtract instructionsFrank Chang
2021-12-20target/riscv: rvv-1.0: integer extension instructionsFrank Chang
2021-12-20target/riscv: rvv-1.0: register gather instructionsFrank Chang
2021-12-20target/riscv: rvv-1.0: find-first-set mask bit instructionFrank Chang
2021-12-20target/riscv: rvv-1.0: count population in mask instructionFrank Chang
2021-12-20target/riscv: rvv-1.0: load/store whole register instructionsFrank Chang
2021-12-20target/riscv: rvv-1.0: fault-only-first unit stride loadFrank Chang
2021-12-20target/riscv: rvv-1.0: index load and store instructionsFrank Chang
2021-12-20target/riscv: rvv-1.0: stride load and store instructionsFrank Chang
2021-12-20target/riscv: rvv-1.0: remove amo operations instructionsFrank Chang
2021-12-20target/riscv: zfh: half-precision floating-point classifyKito Cheng
2021-12-20target/riscv: zfh: half-precision floating-point compareKito Cheng
2021-12-20target/riscv: zfh: half-precision convert and moveKito Cheng
2021-12-20target/riscv: zfh: half-precision computationalKito Cheng
2021-10-07target/riscv: Add rev8 instruction, removing grev/greviPhilipp Tomsich
2021-10-07target/riscv: Add orc.b instruction for Zbb, removing gorc/gorciPhilipp Tomsich
2021-10-07target/riscv: Add instructions of the Zbc-extensionPhilipp Tomsich
2021-09-01target/riscv: Reorg csr instructionsRichard Henderson
2021-06-08target/riscv: rvb: generalized or-combineFrank Chang
2021-06-08target/riscv: rvb: generalized reverseFrank Chang
2021-05-11target/riscv: Consolidate RV32/64 32-bit instructionsAlistair Francis
2020-12-17target/riscv: fpu_helper: Match function defs in HELPER macrosAlistair Francis
2020-11-09target/riscv: Split the Hypervisor execute load helpersAlistair Francis
2020-11-09target/riscv: Remove the hyp load and store functionsAlistair Francis
2020-08-25target/riscv: Support the Virtual Instruction faultAlistair Francis
2020-08-25target/riscv: Allow generating hlv/hlvx/hsv instructionsAlistair Francis
2020-07-02target/riscv: vector compress instructionLIU Zhiwei
2020-07-02target/riscv: vector register gather instructionLIU Zhiwei
2020-07-02target/riscv: vector slide instructionsLIU Zhiwei
2020-07-02target/riscv: vector element index instructionLIU Zhiwei
2020-07-02target/riscv: vector iota instructionLIU Zhiwei
2020-07-02target/riscv: set-X-first mask bitLIU Zhiwei
2020-07-02target/riscv: vmfirst find-first-set mask bitLIU Zhiwei
2020-07-02target/riscv: vector mask population count vmpopcLIU Zhiwei
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