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QEMU is a generic and open source machine & userspace emulator and virtualizer
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riscv
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fpu_helper.c
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Author
2022-03-03
target/riscv: add support for zhinx/zhinxmin
Weiwei Li
2022-03-03
target/riscv: add support for zfinx
Weiwei Li
2021-12-20
target/riscv: add "set round to odd" rounding mode helper function
Frank Chang
2021-12-20
target/riscv: introduce floating-point rounding mode enum
Frank Chang
2021-12-20
target/riscv: zfh: half-precision floating-point classify
Kito Cheng
2021-12-20
target/riscv: zfh: half-precision floating-point compare
Kito Cheng
2021-12-20
target/riscv: zfh: half-precision convert and move
Kito Cheng
2021-12-20
target/riscv: zfh: half-precision computational
Kito Cheng
2021-10-29
target/riscv: change the api for RVF/RVD fmin/fmax
Chih-Min Chao
2021-05-11
target/riscv: Consolidate RV32/64 32-bit instructions
Alistair Francis
2020-12-17
target/riscv: fpu_helper: Match function defs in HELPER macros
Alistair Francis
2020-08-21
target/riscv: Check nanboxed inputs to fp helpers
Richard Henderson
2020-08-21
target/riscv: Generate nanboxed results from fp helpers
Richard Henderson
2020-07-02
target/riscv: vector floating-point classify instructions
LIU Zhiwei
2019-08-19
target/riscv: rationalise softfloat includes
Alex Bennée
2019-02-11
RISC-V: Use riscv prefix consistently on cpu helpers
Michael Clark
2018-12-20
Clean up includes
Markus Armbruster
2018-05-17
target/riscv: Remove floatX_maybe_silence_nan from conversions
Richard Henderson
2018-03-07
RISC-V FPU Support
Michael Clark