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path: root/target/riscv/cpu.h
AgeCommit message (Expand)Author
2024-03-08target/riscv: mcountinhibit, mcounteren, scounteren, hcounteren is 32-bitVadim Shakirov
2024-02-28target/riscv: Use GDBFeature for dynamic XMLAkihiko Odaki
2024-02-09target/riscv: support new isa extension detection devicetree propertiesConor Dooley
2024-02-09target/riscv: use misa_mxl_max to populate isa string rather than TARGET_LONG...Conor Dooley
2024-02-09target/riscv: Move misa_mxl_max to classAkihiko Odaki
2024-02-09target/riscv: change vext_get_vlmax() argumentsDaniel Henrique Barboza
2024-02-09target/riscv/cpu.h: use 'vlenb' in vext_get_vlmax()Daniel Henrique Barboza
2024-02-09target/riscv: Implement optional CSR mcontext of debug Sdtrig extensionAlvin Chang
2024-02-09target/riscv: remove riscv_cpu_options[]Daniel Henrique Barboza
2024-02-09target/riscv: create finalize_features() for KVMDaniel Henrique Barboza
2024-02-09target/riscv: rework 'vext_spec'Daniel Henrique Barboza
2024-02-09target/riscv: rework 'priv_spec'Daniel Henrique Barboza
2024-02-09target/riscv: make riscv_cpu_is_vendor() publicDaniel Henrique Barboza
2024-02-09target/riscv/cpu_cfg.h: remove unused fieldsDaniel Henrique Barboza
2024-02-09target/riscv: Add infrastructure for 'B' MISA extensionRob Bradford
2024-02-03include/exec: Implement cpu_mmu_index genericallyRichard Henderson
2024-02-03target/riscv: Rename riscv_cpu_mmu_index to riscv_env_mmu_indexRichard Henderson
2024-01-10target/riscv: add 'parent' in profile descriptionDaniel Henrique Barboza
2024-01-10target/riscv: add satp_mode profile supportDaniel Henrique Barboza
2024-01-10target/riscv/cpu.c: add riscv_cpu_is_32bit()Daniel Henrique Barboza
2024-01-10target/riscv: add priv ver restriction to profilesDaniel Henrique Barboza
2024-01-10target/riscv: add rva22u64 profile definitionDaniel Henrique Barboza
2024-01-10target/riscv/tcg: add 'zic64b' supportDaniel Henrique Barboza
2024-01-05target/riscv: Use generic cpu_list()Gavin Shan
2023-11-15target/riscv/cpu.h: spelling fix: separatlyMichael Tokarev
2023-11-07target: Move ArchCPUClass definition to 'cpu.h'Philippe Mathieu-Daudé
2023-11-07target/riscv: Move TYPE_RISCV_CPU_BASE definition to 'cpu.h'Philippe Mathieu-Daudé
2023-11-07target/riscv: Remove CPU_RESOLVING_TYPE from 'cpu-qom.h'Philippe Mathieu-Daudé
2023-11-07target: Unify QOM stylePhilippe Mathieu-Daudé
2023-11-07target/riscv: add riscv_cpu_accelerator_compatible()Daniel Henrique Barboza
2023-11-07target/riscv/tcg: add tcg_cpu_finalize_features()Daniel Henrique Barboza
2023-11-07target/riscv: Add HS-mode virtual interrupt and IRQ filtering support.Rajnesh Kanwal
2023-11-07target/riscv: Add M-mode virtual interrupt and IRQ filtering support.Rajnesh Kanwal
2023-11-07target/riscv: Split interrupt logic from riscv_cpu_update_mip.Rajnesh Kanwal
2023-10-12target/riscv: deprecate capital 'Z' CPU propertiesDaniel Henrique Barboza
2023-10-12target/riscv: add riscv_cpu_get_name()Daniel Henrique Barboza
2023-10-12target/riscv/cpu: move priv spec functions to tcg-cpu.cDaniel Henrique Barboza
2023-10-12target/riscv/cpu.c: export isa_edata_arr[]Daniel Henrique Barboza
2023-10-12target/riscv/tcg: move riscv_cpu_add_misa_properties() to tcg-cpu.cDaniel Henrique Barboza
2023-10-12target/riscv/tcg: introduce tcg_cpu_instance_init()Daniel Henrique Barboza
2023-10-12target/riscv/cpu.c: export set_misa()Daniel Henrique Barboza
2023-10-12target/riscv/kvm: do not use riscv_cpu_add_misa_properties()Daniel Henrique Barboza
2023-10-12target/riscv: make riscv_add_satp_mode_properties() publicDaniel Henrique Barboza
2023-10-12target/riscv: move riscv_cpu_add_kvm_properties() to kvm.cDaniel Henrique Barboza
2023-10-12target/riscv: move riscv_tcg_ops to tcg-cpu.cDaniel Henrique Barboza
2023-10-12target/riscv: move riscv_cpu_validate_set_extensions() to tcg-cpu.cDaniel Henrique Barboza
2023-10-12target/riscv: introduce TCG AccelCPUClassDaniel Henrique Barboza
2023-10-12target/riscv: make CPUCFG() macro publicDaniel Henrique Barboza
2023-10-03accel/tcg: Move CPUNegativeOffsetState into CPUStateRichard Henderson
2023-09-08riscv: spelling fixesMichael Tokarev
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