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2024-05-24target/ppc: Remove pp_check() and reuse ppc_hash32_pp_prot()BALATON Zoltan
The ppc_hash32_pp_prot() function in mmu-hash32.c is the same as pp_check() in mmu_common.c, merge these to remove duplicated code. Define the common function as static lnline otherwise exporting the function from mmu-hash32.c would stop the compiler inlining it which results in slightly lower performance. Reviewed-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> [np: move ppc_hash32_pp_prot inline without changing it] Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
2024-05-24target/ppc: Move out BookE and related MMU functions from mmu_common.cBALATON Zoltan
Add a new mmu-booke.c file for BookE and related MMU bits from mmu_common.c. Acked-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
2024-05-24target/ppc: Add a function to check for page protection bitBALATON Zoltan
Checking if a page protection bit is set for a given access type is a common operation. Add a function to avoid repeating the same check at multiple places. As this relies on access type and page protection bit values having certain relation also add an assert to ensure that this assumption holds. Reviewed-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
2024-05-24target/ppc/mmu-radix64.c: Drop a local variableBALATON Zoltan
The value is only used once so no need to introduce a local variable for it. Reviewed-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
2024-05-24target/ppc/mmu-hash32.c: Drop a local variableBALATON Zoltan
In ppc_hash32_xlate() the value of need_prop is checked in two places but precalculating it does not help because when we reach the first check we always return and not reach the second place so the value will only be used once. We can drop the local variable and calculate it when needed, which makes these checks using it similar to other places with such checks. Reviewed-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
2024-05-24target/ppc: Split off common embedded TLB initBALATON Zoltan
Several 4xx CPUs and e200 share the same TLB settings enclosed in an ifdef. Split it off in a common function to reduce code duplication and the number of ifdefs. Reviewed-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
2024-05-24target/ppc: Remove id_tlbs flag from CPU envBALATON Zoltan
This flag for split instruction/data TLBs is only set for 6xx soft TLB MMU model and not used otherwise so no need to have a separate flag for that. Reviewed-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
2024-05-24target/ppc: Move mmu_ctx_t type to mmu_common.cBALATON Zoltan
Remove mmu_ctx_t definition from internal.h as this type is only used within mmu_common.c. Reviewed-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
2024-05-24target/ppc: Transform ppc_jumbo_xlate() into ppc_6xx_xlate()BALATON Zoltan
Now that only 6xx cases left in ppc_jumbo_xlate() we can change it to ppc_6xx_xlate() also removing get_physical_address_wtlb(). Reviewed-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
2024-05-24target/ppc: Split off 40x cases from ppc_jumbo_xlate()BALATON Zoltan
Introduce ppc_40x_xlate() to split off 40x handlning leaving only 6xx in ppc_jumbo_xlate() now. Reviewed-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
2024-05-24target/ppc: Split off real mode handling from get_physical_address_wtlb()BALATON Zoltan
Add ppc_real_mode_xlate() to handle real mode translation and allow removing this case from ppc_jumbo_xlate(). Reviewed-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
2024-05-24target/ppc: Simplify ppc_booke_xlate() part 2BALATON Zoltan
Merge the code fetch and data access cases in a common switch. Reviewed-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
2024-05-24target/ppc: Simplify ppc_booke_xlate() part 1BALATON Zoltan
Move setting error_code that appears in every case out in front and hoist the common fall through case for BOOKE206 as well which allows removing the nested switches. Reviewed-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
2024-05-24target/ppc: Split off BookE handling from ppc_jumbo_xlate()BALATON Zoltan
Introduce ppc_booke_xlate() to handle BookE and BookE 2.06 cases to reduce ppc_jumbo_xlate() further. Reviewed-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
2024-05-24target/ppc: Remove BookE from direct store handlingBALATON Zoltan
As BookE never returns -4 we can drop BookE from the direct store case in ppc_jumbo_xlate(). Reviewed-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
2024-05-24target/ppc: Don't use mmu_ctx_t in mmubooke206_get_physical_address()BALATON Zoltan
mmubooke206_get_physical_address() only uses the raddr and prot fields from mmu_ctx_t. Pass these directly instead of using a ctx struct. Reviewed-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
2024-05-24target/ppc: Don't use mmu_ctx_t in mmubooke_get_physical_address()BALATON Zoltan
mmubooke_get_physical_address() only uses the raddr and prot fields from mmu_ctx_t. Pass these directly instead of using a ctx struct. Reviewed-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
2024-05-24target/ppc: Don't use mmu_ctx_t for mmu40x_get_physical_address()BALATON Zoltan
mmu40x_get_physical_address() only uses the raddr and prot fields from mmu_ctx_t. Pass these directly instead of using a ctx struct. Reviewed-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
2024-05-24target/ppc: Replace hard coded constants in ppc_jumbo_xlate()BALATON Zoltan
The "2" in booke206_update_mas_tlb_miss() call corresponds to MMU_INST_FETCH which is the value of access_type in this branch; mmubooke206_esr() only checks for MMU_DATA_STORE and it's called from code access so using MMU_DATA_LOAD here seems wrong so replace it with access_type here as well that yields the same result. This also makes these calls the same as the data access branch further down. Reviewed-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
2024-05-24target/ppc: Deindent ppc_jumbo_xlate()BALATON Zoltan
Instead of putting a large block of code in an if, invert the condition and return early to be able to deindent the code block. Acked-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
2024-05-24target/ppc: Fix misindented qemu_log_mask() callsBALATON Zoltan
Fix several qemu_log_mask() calls that are misindented. Acked-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
2024-05-24target/ppc: Inline and remove check_physical()BALATON Zoltan
This function just does two assignments and and unnecessary check that is always true so inline it in the only caller left and remove it. Reviewed-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
2024-05-24target/ppc: Split off real mode cases in get_physical_address_wtlb()BALATON Zoltan
The real mode handling is identical in the remaining switch cases. Split off these common real mode cases into a separate conditional to leave only the else branches in the switch that are different. Reviewed-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
2024-05-24target/ppc: Split out BookE xlate cases before checking real modeBALATON Zoltan
BookE does not have real mode so split off and handle it first in get_physical_address_wtlb() before checking for real mode for other MMU models. Reviewed-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
2024-05-24target/ppc: Eliminate ret from mmu6xx_get_physical_address()BALATON Zoltan
Return directly, which is simpler than dragging a return value through multpile if and else blocks. Reviewed-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
2024-05-24target/ppc: Move some debug logging in ppc6xx_tlb_check()BALATON Zoltan
Move the debug logging within ppc6xx_tlb_check() from after its only call to simplify the caller. Reviewed-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
2024-05-24target/ppc: Move else branch to avoid large if block in ↵BALATON Zoltan
mmu6xx_get_physical_address() In mmu6xx_get_physical_address() we have a large if block with a two line else branch that effectively returns. Invert the condition and move the else there to allow deindenting the large if block to make the flow easier to follow. Reviewed-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
2024-05-24target/ppc: Introduce mmu6xx_get_physical_address()BALATON Zoltan
Repurpose get_segment_6xx_tlb() to do the whole address translation for POWERPC_MMU_SOFT_6xx MMU model by moving the BAT check there and renaming it to match other similar functions. These are only called once together so no need to keep these separate functions and combining them simplifies the caller allowing further restructuring. Reviewed-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
2024-05-24target/ppc: Drop cases for unimplemented MPC8xx MMUBALATON Zoltan
Drop MPC8xx cases from get_physical_address_wtlb() and ppc_jumbo_xlate(). The default case would still catch this and abort the same way and there is still a warning about it in ppc_tlb_invalidate_all() which is called in ppc_cpu_reset_hold() so likely we never get here but to make sure add a case to ppc_xlate() to the same effect. Reviewed-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
2024-05-24target/ppc: Simplify checking for real mode in get_physical_address_wtlb()BALATON Zoltan
In get_physical_address_wtlb() the real_mode flag depends on either the MSR[IR] or MSR[DR] bit depending on access_type. Extract just the needed bit in a more straight forward way instead of doing unnecessary computation. Reviewed-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
2024-05-24target/ppc: Remove unneeded local variable from booke tlb checksBALATON Zoltan
In mmubooke_check_tlb() and mmubooke206_check_tlb() we can assign the value of prot2 directly to the destination, no need to have a separate local variable for it. Reviewed-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
2024-05-24target/ppc: Move calculation of a value closer to its usage in booke tlb checksBALATON Zoltan
In mmubooke_check_tlb() and mmubooke206_check_tlb() prot2 is calculated first but only used after an unrelated check that can return before tha value is used. Move the calculation after the check, closer to where it is used, to keep them together and avoid computing it when not needed. Reviewed-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
2024-05-24target/ppc: Remove unused helper_rac()BALATON Zoltan
The helper_rac function is defined but not used, remove it. Fixes: 005b69fdcc (target/ppc: Remove PowerPC 601 CPUs) Reviewed-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
2024-05-24target/ppc: Remove unused struct 'mmu_ctx_hash32'Dr. David Alan Gilbert
I think it's use was removed by Commit 5883d8b296 ("mmu-hash*: Don't use full ppc_hash{32, 64}_translate() path for get_phys_page_debug()") Reviewed-by: BALATON Zoltan <balaton@eik.bme.hu> Signed-off-by: Dr. David Alan Gilbert <dave@treblig.org> Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
2024-05-24target/ppc: add SMT support to msgsnd broadcastNicholas Piggin
msgsnd has a broadcast mode that sends hypervisor doorbells to all threads belonging to the same core as the target. A "subcore" mode sends to all or one thread depending on 1LPAR mode. Reviewed-by: Glenn Miles <milesg@linux.ibm.com> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
2024-05-24target/ppc: Implement SPRC/SPRD SPRsNicholas Piggin
This implements the POWER SPRC/SPRD SPRs, and SCRATCH0-7 registers that can be accessed via these indirect SPRs. SCRATCH registers only provide storage, but they are used by firmware for low level crash and progress data, so this implementation logs writes to the registers to help with analysis. Reviewed-by: Glenn Miles <milesg@linux.ibm.com> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
2024-05-24target/ppc: Implement LDBAR, TTR SPRsNicholas Piggin
LDBAR, TTR are a Power-specific SPRs. These simple implementations are enough for IBM proprietary firmware for now. Reviewed-by: Glenn Miles <milesg@linux.ibm.com> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
2024-05-24target/ppc: Add SMT support to PTCR SPRNicholas Piggin
PTCR is a per-core register. Reviewed-by: Glenn Miles <milesg@linux.ibm.com> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
2024-05-24target/ppc: Add SMT support to simple SPRsNicholas Piggin
AMOR, MMCRC, HRMOR, TSCR, HMEER, RPR SPRs are per-core or per-LPAR registers with simple (generic) implementations. Reviewed-by: Glenn Miles <milesg@linux.ibm.com> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
2024-05-24target/ppc: add helper to write per-LPAR SPRsNicholas Piggin
An SPR can be either per-thread, per-core, or per-LPAR. Per-LPAR means per-thread or per-core, depending on 1LPAR mode. Reviewed-by: Glenn Miles <milesg@linux.ibm.com> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
2024-05-24target/ppc: Add PPR32 SPRNicholas Piggin
PPR32 provides access to the upper half of PPR. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
2024-05-24target/ppc: BookE DECAR SPR is 32-bitNicholas Piggin
The DECAR SPR is 32-bits width. Reviewed-by: Glenn Miles <milesg@linux.ibm.com> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
2024-05-24target/ppc: Implement attn instruction on BookS 64-bit processorsNicholas Piggin
attn is an implementation-specific instruction that on POWER (and G5/ 970) can be enabled with a HID bit (disabled = illegal), and executing it causes the host processor to stop and the service processor to be notified. Generally used for debugging. Implement attn and make it checkstop the system, which should be good enough for QEMU debugging. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
2024-05-24target/ppc: improve checkstop loggingNicholas Piggin
Change the logging not to print to stderr as well, because a checkstop is a guest error (or perhaps a simulated machine error) rather than a QEMU error, so send it to the log. Update the checkstop message, and log CPU registers too. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Glenn Miles <milesg@linux.ibm.com> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
2024-05-24target/ppc: Make checkstop actually stop the systemNicholas Piggin
checkstop state does not halt the system, interrupts continue to be serviced, and other CPUs run. Make it stop the machine with qemu_system_guest_panicked. Reviewed-by: Glenn Miles <milesg@linux.ibm.com> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
2024-05-24target/ppc: Remove redundant MEMOP_GET_SIZE macroNicholas Piggin
There is a memop_size() function for this. Reviewed-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
2024-05-24target/ppc: larx/stcx generation need only apply DEF_MEMOP() onceNicholas Piggin
Use DEF_MEMOP() consistently in larx and stcx. generation, and apply it once when it's used rather than where the macros are expanded, to reduce typing. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
2024-05-24target/ppc: Add migration support for BHRBGlenn Miles
Adds migration support for Branch History Rolling Buffer (BHRB) internal state. Reviewed-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Glenn Miles <milesg@linux.vnet.ibm.com> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
2024-05-24target/ppc: Add clrbhrb and mfbhrbe instructionsGlenn Miles
Add support for the clrbhrb and mfbhrbe instructions. Since neither instruction is believed to be critical to performance, both instructions were implemented using helper functions. Access to both instructions is controlled by bits in the HFSCR (for privileged state) and MMCR0 (for problem state). A new function, helper_mmcr0_facility_check, was added for checking MMCR0[BHRBA] and raising a facility_unavailable exception if required. NOTE: For P8 and P9, due to a performance issue, branch history will not be kept, but the instructions will be allowed to execute as normal with the exception that the mfbhrbe instruction will always return a zero value. Reviewed-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Glenn Miles <milesg@linux.vnet.ibm.com> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
2024-05-24target/ppc: Add recording of taken branches to BHRBGlenn Miles
This commit continues adding support for the Branch History Rolling Buffer (BHRB) as is provided starting with the P8 processor and continuing with its successors. This commit is limited to the recording and filtering of taken branches. The following changes were made: - Enabled functionality on P10 processors only due to performance impact seen with P8 and P9 where it is not disabled for non problem state branches. - Added a BHRB buffer for storing branch instruction and target addresses for taken branches - Renamed gen_update_cfar to gen_update_branch_history and added a 'target' parameter to hold the branch target address and 'inst_type' parameter to use for filtering - Added TCG code to gen_update_branch_history that stores data to the BHRB and updates the BHRB offset. - Added BHRB resource initialization and reset functions Reviewed-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Glenn Miles <milesg@linux.vnet.ibm.com> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
generated by cgit v1.2.3 (git 2.26.2) at 2024-12-20 01:02:26 +0000